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ADS1018 Arkusz danych(PDF) 3 Page - Texas Instruments |
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ADS1018 Arkusz danych(HTML) 3 Page - Texas Instruments |
3 / 37 page ADS1018 www.ti.com SBAS526B – NOVEMBER 2012 – REVISED OCTOBER 2013 ELECTRICAL CHARACTERISTICS Maximum and minimum specifications apply from TA = –40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All specifications are at VDD = 3.3 V and full-scale (FS) = ±2.048 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ANALOG INPUT Full-scale input voltage range VIN = (AINP) – (AINN) See Table 2 V Analog input voltage AINP or AINN to GND GND VDD V ZID Differential input impedance See Table 1 FS = ±6.144 V(1) 8 M Ω FS = ±4.096 V(1), ±2.048 V 6 M Ω ZIC Common-mode input impedance FS = ±1.024 V 3 M Ω FS = ±0.512 V, ±0.256 V 100 M Ω SYSTEM PERFORMANCE Resolution No missing codes 12 Bits DR Data rate 128, 250, 490, 920, 1600, 2400, 3300 SPS Data rate variation All data rates –10% 10% Output noise See Typical Characteristics INL Integral nonlinearity DR = 128 SPS, FS = ±2.048 V(2) 0.5 LSB FS = ±2.048 V, differential inputs 0 ±0.5 LSB EO Offset error FS = ±2.048 V, single-ended inputs ±0.25 LSB Offset drift FS = ±2.048 V 0.002 LSB/°C EG Gain error(3) FS = ±2.048 V at TA = +25°C 0.05% 0.25% FS = ±0.256 V 7 ppm/°C Gain drift(3)(4) FS = ±2.048 V 5 40 ppm/°C FS = ±6.144 V(1) 5 ppm/°C PGA gain match(3) Match between any two PGA gains 0.02% 0.1% Gain match Match between any two inputs 0.05% 0.1% Offset match Match between any two inputs 0.25 LSB TEMPERATURE SENSOR Temperature sensor range –40 +125 °C Temperature sensor resolution 0.125 °C/LSB TA = 0°C to +70°C 0.25 ±1 °C Temperature sensor accuracy TA = –40°C to +125°C 0.5 ±2 °C vs supply 0.125 ±1 °C/V DIGITAL INPUT/OUTPUT VIH Logic input level, high 0.7 VDD VDD V VIL Logic input level, low GND 0.2 VDD V VOH Logic output level, high IOH = 1 mA 0.8 VDD V VOL Logic output level, low IOL = 1 mA GND 0.2 VDD V IH Input leakage, high VIH = 5.5 V ±10 μA IL Input leakage, low VIL = GND ±10 μA (1) This parameter expresses the full-scale range of the ADC scaling. In no event should more than VDD + 0.3 V or 5.5 V (whichever is smaller) be applied to this device. (2) Best-fit INL; covers 99% of full-scale. (3) Includes all errors from the onboard PGA and reference. (4) Not production tested; ensured by characterization. Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: ADS1018 |
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