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ADS823E Arkusz danych(PDF) 3 Page - Texas Instruments |
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ADS823E Arkusz danych(HTML) 3 Page - Texas Instruments |
3 / 20 page ADS823, ADS826 SBAS070B 3 www.ti.com DIGITAL INPUTS Logic Family Convert Command Start Conversion High Level Input Current(6) (VIN = 5V) +100 ✻ µA Low Level Input Current (VIN = 0V) +10 ✻ µA High Level Input Voltage +3.5 +2.0 V Low Level Input Voltage +1.0 +0.8 V Input Capacitance 5 ✻ pF DIGITAL OUTPUTS Logic Family Logic Coding Low Output Voltage (IOL = 50µA to 1.6mA) VDRV = 5V +0.1 ✻ V High Output Voltage, (IOH = 50µA to 0.5mA) +4.9 ✻ V Low Output Voltage, (IOL = 50µA to 1.6mA) VDRV = 3V +0.1 ✻ V High Output Voltage, (IOH = 50µA to 0.5mA) +2.8 ✻ V 3-State Enable Time OE = H to L 2 40 ✻✻ ns 3-State Disable Time OE = L to H 2 10 ✻✻ ns Output Capacitance 5 ✻ pF ACCURACY (Internal Reference, 2Vp-p, fS = 2.5Mhz Unless Otherwise Noted) Zero Error (referred to –FS) At 25 °C ±1.0 ±3.0 ✻✻ % FS Zero Error Drift (referred to –FS) 16 ✻ ppm/ °C Midscale Offset Error At 25 °C ±0.29 % FS Gain Error(7) At 25 °C ±1.5 ±3.5 ✻✻ % FS Gain Error Drift(7) 66 ✻ ppm/ °C Gain Error(8) At 25 °C ±1.0 ±2.5 ✻✻ % FS Gain Error Drift(8) 23 ✻ ppm/ °C Power-Supply Rejection of Gain ∆V S = ±5% 70 ✻ dB REFT Tolerance Deviation From Ideal 3.5V ±10 ±25 ✻✻ mV REFB Tolerance(9) Deviation From Ideal 1.5V ±10 ±25 ✻✻ mV External REFT Voltage Range REFB + 0.8 3.5 VS – 1.25 ✻✻ ✻ V External REFB Voltage Range 1.25 1.5 REFT – 0.8 ✻✻ ✻ V Reference Input Resistance REFT to REFB 1.6 ✻ k Ω POWER-SUPPLY REQUIREMENTS Supply Voltage: +VS Operating +4.75 +5.0 +5.25 ✻✻ ✻ V Supply Current: +IS Operating 55 ✻ mA Power Dissipation: VDRV = 5V External Reference 275 335 ✻✻ mW VDRV = 3V External Reference 265 ✻ mW VDRV = 5V Internal Reference 295 350 ✻✻ mW VDRV = 3V Internal Reference 285 ✻ mW Power-Down Operating 20 ✻ mW Thermal Resistance, θ JA SSOP-28 89 ✻ °C/W ✻ Indicates the same specifications as the ADS823E. NOTES: (1) ADS826 accepts a +3V clock input. (2) Spurious-Free Dynamic Range refers to the magnitude of the largest harmonic. (3) dBFS means dB relative to Full-Scale. (4) 2-tone intermodulation distortion is referred to the largest fundamental tone. This number will be 6dB higher if it is referred to the magnitude of the 2-tone fundamental envelope. (5) Effective number of bits (ENOB) is defined by (SINAD – 1.76)/6.02. (6) A 50k Ω pull-down resistor is inserted internally on OE pin. (7) Includes internal reference. (8) Excludes internal reference. (9) Ensured by design. ELECTRICAL CHARACTERISTICS (Cont.) At TA = full specified temperature range, VS = +5V single-ended input range = 1.5V to 3.5V, sampling rate = 60MHz, external reference, unless otherwise noted. ADS823E ADS826E(1) MIN TYP MAX MIN TYP MAX UNITS CMOS-Compatible Rising Edge of Convert Clock TTL, +3V/+5V CMOS-Compatible Rising Edge of Convert Clock CMOS Straight Offset Binary CMOS Straight Offset Binary |
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