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ADC08100 Arkusz danych(PDF) 5 Page - Texas Instruments |
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ADC08100 Arkusz danych(HTML) 5 Page - Texas Instruments |
5 / 28 page ADC08100 www.ti.com SNAS060I – JUNE 2000 – REVISED MAY 2013 Converter Electrical Characteristics The following specifications apply for VA = DR VD = +3.0VDC, VRT = +1.9V, VRB = 0.3V, CL = 10 pF, fCLK = 100 MHz at 50% duty cycle. Boldface limits apply for TJ = TMIN to TMAX: all other limits TJ = 25°C (1) (2) (3) Typical Limits Units Symbol Parameter Conditions (4) (4) (Limits) DC ACCURACY Resolution with no missing codes 8 Bits INL Integral Non-Linearity ±0.5 ±1.3 LSB (max) +1.0 LSB (max) DNL Differential Non-Linearity ±0.4 −0.95 LSB (min) FSE Full Scale Error 18 ±28 mV (max) VOFF Zero Scale Offset Error 26 ±35 mV (max) ANALOG INPUT AND REFERENCE CHARACTERISTICS VRB V (min) VIN Input Voltage 1.6 VRT V (max) (CLK LOW) 3 pF CIN VIN Input Capacitance VIN = 0.75V +0.5 Vrms (CLK HIGH) 4 pF RIN RIN Input Resistance >1 M Ω BW Full Power Bandwidth 200 MHz VA V (max) VRT Top Reference Voltage 1.9 1.0 V (min) VRT − 1.0 V (max) VRB Bottom Reference Voltage 0.3 0 V (min) 1.0 V (min) VRT - VRB Reference Delta 1.6 2.3 V (max) 150 Ω (min) RREF Reference Ladder Resistance VRT to VRB 220 300 Ω (max) 5.3 mA (min) IREF Reference Ladder Current 7.3 10.6 mA (max) (1) The Electrical characteristics tables list ensured specifications under the listed Recommended Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations for room temperature only and are not ensured. (2) The analog inputs are protected as shown below. Input voltage magnitudes up to VA + 300 mV or to 300 mV below GND will not damage this device. However, errors in the A/D conversion can occur if the input goes above DR VD or below GND by more than 100 mV. For example, if VA is 2.7VDC the full-scale input voltage must be ≤2.6VDC to ensure accurate conversions. (3) To ensure accuracy, it is required that VA and DR VD be well bypassed. Each supply pin must be decoupled with separate bypass capacitors. (4) Typical figures represent most likely parametric norms at TJ = 25°C. Test limits are ensured to TI's AOQL (Average Outgoing Quality Level). Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: ADC08100 |
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