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ADS1208IPW Arkusz danych(PDF) 6 Page - Texas Instruments |
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ADS1208IPW Arkusz danych(HTML) 6 Page - Texas Instruments |
6 / 25 page www.ti.com Internal MCLK Internal MDATA MDATA t C 1 t W 1 1 0 1 1 0 0 TIMING CHARACTERISTICS: MODE 2 M D A T M C LK t C 4 t W 4 t D 4 M C LK TIMING CHARACTERISTICS: MODE 3 ADS1208 SBAS348A – MARCH 2005 – REVISED MARCH 2005 Figure 3. Mode 2 Operation Over recommended operating free-air temperature range at –40°C to +85°C, and AV DD = +5V, BVDD = +2.7 to +5.5V, unless otherwise noted. PARAMETER MIN MAX UNIT tC1 Clock period 83 125 ns tW1 Clock high time (tC1 /2) – 5 (tC1 /2) + 5 ns note: MCLK is system clock input. MCLK is modulator clock output. Modulator clock frequency is half of system clock frequency. Figure 4. Mode 3 Operation Over recommended operating free-air temperature range at –40°C to +85°C, and AV DD = +5V, BVDD = +2.7 to +5.5V, unless otherwise noted. PARAMETER MIN MAX UNIT tC4 Clock period 41 1000 ns tW4 Clock high time 10 tC4 – 10 ns tD4 Data and output clock delay after falling edge of input clock 0 10 ns tR Rise time of clock (10% to 90% of BVDD) 0 10 ns tF Fall time of clock (90% to 10% of BVDD) 0 10 ns 6 |
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