Zakładka z wyszukiwarką danych komponentów |
|
ADC10461 Arkusz danych(PDF) 5 Page - Texas Instruments |
|
ADC10461 Arkusz danych(HTML) 5 Page - Texas Instruments |
5 / 24 page ADC10461, ADC10462, ADC10464 www.ti.com SNAS074E – JUNE 1999 – REVISED MARCH 2013 DC Electrical Characteristics The following specifications apply for V + = +5V, V REF(+) = 5V VREF( −) = GND, and Speed Adjust pin unconnected unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25°C. Units Symbol Parameter Conditions Typical(1) Limit(2) (Limits) VIN(1) Logical “1” Input Voltage V+ = 5.5V 2.0 V (min) VIN(0) Logical “0” Input Voltage V+ = 4.5V 0.8 V (max) IIN(1) Logical “1” Input Current VIN(1) = 5V 0.005 3.0 µA (max) IIN(0) Logical “0” Input Current VIN(0) 0V −0.005 −3.0 µA (max) V+ = 4.5V, IOUT = −360 µA 2.4 V (min) VOUT(1) Logical “1” Output Voltage V+ = 4.5V, IOUT = −10 µA 4.25 V (min) VOUT(0) Logical “0” Output Voltage V+ = 4.5V, IOUT = 1.6 mA 0.4 V (max) VOUT = 5V 0.1 50 µA (max) IOUT TRI-STATE Output Current VOUT = 0V −0.1 −50 µA (max) CS = S /H = RD = 0, RSA = ∞ 1.0 2 mA (max) DICC DVCC Supply Current CS = S /H = RD = 0, RSA = 18 kΩ 1.0 mA (max) CS = S /H = RD = 0, RSA = ∞ 30 45 mA (max) AICC AVCC Supply Current CS = S /H = RD = 0, RSA = 18 kΩ 30 mA (max) (1) Typical figures represent most likely parametric norm. (2) Limits are specified to TI's AOQL (Average Outgoing Quality Level). AC Electrical Characteristics The following specifications apply for V + = +5V, t r = tf = 20 ns, VREF(+) = 5V, VREF( −) = GND, and Speed Adjust pin unconnected unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25°C. Units Symbol Parameter Conditions Typical(1) Limit(2) (Limits) Mode 1 Conversion Time from Rising Edge CIN, CIWM Suffixes 600 750/900 ns (max) tCONV of S /H to Falling Edge of INT RSA = 18k 375 ns CIN, CIWM Suffixes 850 1400 ns (max) tCRD Mode 2 Conversion Time Mode 2, RSA = 18k 530 ns Access Time (Delay from Falling Edge of tACC1 Mode 1; CL = 100 pF 30 60 ns (max) RD to Output Valid) Access Time (Delay from Falling Edge of tACC2 Mode 2; CL = 100 pF 900 tCRD + 50 ns (max) RD to Output Valid) tSH Minimum Sample Time (Figure 4)(3) 250 ns (max) TRI-STATE Control (Delay from Rising t1H, t0H RL = 1k, CL = 10 pF 30 60 ns (max) Edge of RD to High-Z State) Delay from Rising Edge of RD to Rising tINTH CL = 100 pF 25 50 ns (max) Edge of INT Delay from End of Conversion to Next tP 50 ns (max) Conversion tMS Multiplexer Control Setup Time 10 75 ns (max) tMH Multiplexer Hold Time 10 40 ns (max) CVIN Analog Input Capacitance 35 pF (max) COUT Logic Output Capacitance 5 pF (max) CIN Logic Input Capacitance 5 pF (max) (1) Typical figures represent most likely parametric norm. (2) Limits are specified to TI's AOQL (Average Outgoing Quality Level). (3) Accuracy may degrade if tSH is shorter than the value specified. See curves of Accuracy vs. tSH. Copyright © 1999–2013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: ADC10461 ADC10462 ADC10464 |
Podobny numer części - ADC10461_14 |
|
Podobny opis - ADC10461_14 |
|
|
Link URL |
Polityka prywatności |
ALLDATASHEET.PL |
Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |