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MC-458CB641ES Arkusz danych(PDF) 11 Page - NEC |
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MC-458CB641ES Arkusz danych(HTML) 11 Page - NEC |
11 / 6 page Data Sheet M14015EJ4V0DS00 11 MC-458CB641ES, 458CB641PS (2/2) Byte No. Function Described Hex Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Notes 32 Command and address -A80 20H 0 0 1 0 0 0 0 0 2 ns signal setup time -A10 20H 0 0 1 0 0 0 0 0 2 ns 33 Command and address -A80 10H 0 0 0 1 0 0 0 0 1 ns signal hold time -A10 10H 0 0 0 1 0 0 0 0 1 ns 34 Data signal input setup time -A80 20H 0 0 1 0 0 0 0 0 2 ns -A10 20H 0 0 1 0 0 0 0 0 2 ns 35 Data signal input hold time -A80 10H 0 0 0 1 0 0 0 0 1 ns -A10 10H 0 0 0 1 0 0 0 0 1 ns 36-61 00H 0 0 0 0 0 0 0 0 62 SPD revision -A80 12H 0 0 0 1 0 0 1 0 1.2 A -A10 12H 0 0 0 1 0 0 1 0 1.2 A 63 Checksum for bytes 0 - 62 -A80 E7H 1 1 1 0 0 1 1 1 -A10 4DH 0 10 01 10 1 64-71 Manufacture’s JEDEC ID code 72 Manufacturing location 73-90 Manufacture’s P/N 91-92 Revision code 93-94 Manufacturing date 95-98 Assembly serial number 99-126 Mfg specific 126 Intel specification frequency -A80 64H 0 1 1 0 0 1 0 0 100 MHz -A10 64H 0 1 1 0 0 1 0 0 100 MHz 127 Intel specification /CAS -A80 87H 1 0 0 0 0 1 1 1 latency support -A10 85H 1 0 0 0 0 1 0 1 Timing Chart Refer to the SYNCHRONOUS DRAM MODULE TIMING CHART Information (M13348E). |
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Podobny opis - MC-458CB641ES |
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