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74HCT573 Arkusz danych(PDF) 11 Page - NXP Semiconductors |
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74HCT573 Arkusz danych(HTML) 11 Page - NXP Semiconductors |
11 / 21 page 74HC_HCT573 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 5 — 15 August 2012 11 of 21 NXP Semiconductors 74HC573; 74HCT573 Octal D-type transparent latch; 3-state Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 9. Enable and disable times 001aae307 tPLZ tPHZ outputs disabled outputs enabled 90% 10% outputs enabled output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH OE input VI VOL VOH VCC VM GND GND tPZL tPZH VM VM Measurement points are given in Table 8. The shaded areas indicate when the input is permitted to change for predictable output performance. Fig 10. Set-up and hold times for data input (Dn) to latch input (LE) 001aae084 VM LE input Dn input VM th tsu th tsu Table 8. Measurement points Type Input Output VM VM 74HC573 0.5VCC 0.5VCC 74HCT573 1.3 V 1.3 V |
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