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Zakładka z wyszukiwarką danych komponentów |
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FW82371 Arkusz danych(PDF) 5 Page - Intel Corporation |
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FW82371 Arkusz danych(HTML) 5 Page - Intel Corporation |
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5 / 284 page  82371AB (PIIX4) 5 4/9/97 2:23 PM PIIX4aDS INTEL CONFIDENTIAL (until publication date) PRELIMINARY 4.1.6. CLASSC—Class Code Register (Function 0) .....................................................................................56 4.1.7. HEDT—Header Type Register (Function 0)........................................................................................56 4.1.8. IORT—ISA I/O Recovery Timer Register (Function 0) .......................................................................56 4.1.9. XBCS—X-Bus Chip Select Register (Function 0) ...............................................................................57 4.1.10. PIRQRC[A:D]—PIRQX Route Control Registers (Function 0) .........................................................59 4.1.11. SERIRQC—Serial IRQ Control Register (Function 0) ......................................................................59 4.1.12. TOM—Top of Memory Register (Function 0) ....................................................................................60 4.1.13. MSTAT—Miscellaneous Status Register (Function 0)......................................................................61 4.1.14. MBDMA[1:0]—Motherboard Device DMA Control Registers (Function 0)........................................61 4.1.15. APICBASE—APIC Base Address Relocation Register (Function 0)................................................62 4.1.16. DLC—Deterministic Latency Control Register (Function 0)..............................................................62 4.1.17. PDMACFG—PCI DMA Configuration Register (Function 0).............................................................63 4.1.18. DDMABP—Distributed DMA Slave Base Pointer Registers (Function 0).........................................64 4.1.19. GENCFG—General Configuration Register (Function 0) .................................................................65 4.1.20. RTCCFG—Real Time Clock Configuration Register (Function 0) ....................................................67 4.2. PCI to ISA/EIO Bridge IO Space Registers (IO) ........................................................................................68 4.2.1. DMA Registers.....................................................................................................................................68 4.2.1.1. DCOM—DMA Command Register (IO)........................................................................................68 4.2.1.2. DCM—DMA Channel Mode Register (IO)....................................................................................69 4.2.1.3. DR—DMA Request Register (IO).................................................................................................70 4.2.1.4. WSMB—Write Single Mask Bit (IO) .............................................................................................70 4.2.1.5. RWAMB—Read/Write All Mask Bits (IO) .....................................................................................71 4.2.1.6. DS—DMA Status Register (IO) ....................................................................................................71 4.2.1.7. DBADDR—DMA Base and Current Address Registers (IO) .......................................................72 4.2.1.8. DBCNT—DMA Base and Current Count Registers (IO)..............................................................72 4.2.1.9. DLPAGE—DMA Low Page Registers (IO)...................................................................................73 4.2.1.10. DCBP—DMA Clear Byte Pointer Register (IO)..........................................................................73 4.2.1.11. DMC—DMA Master Clear Register (IO) ....................................................................................73 4.2.1.12. DCLM—DMA Clear Mask Register (IO).....................................................................................74 4.2.2. Interrupt Controller Registers...............................................................................................................74 4.2.2.1. ICW1—Initialization Command Word 1 Register (IO) ..................................................................74 4.2.2.2. ICW2—Initialization Command Word 2 Register (IO) ..................................................................75 4.2.2.3. ICW3—Initialization Command Word 3 Register (IO) ..................................................................75 4.2.2.4. ICW3—Initialization Command Word 3 Register (IO) ..................................................................76 4.2.2.5. ICW4—Initialization Command Word 4 Register (IO) ..................................................................76 4.2.2.6. OCW1—Operational Control Word 1 Register (IO)......................................................................77 4.2.2.7. OCW2—Operational Control Word 2 Register (IO)......................................................................77 4.2.2.8. OCW3— Operational Control Word 3 Register (IO).....................................................................78 4.2.2.9. ELCR1—Edge/Level Control Register (IO) ..................................................................................79 4.2.2.10. ELCR2—Edge/Level Control Register (IO) ................................................................................79 4.2.3. Counter/Timer Registers......................................................................................................................80 4.2.3.1. TCW—Timer Control Word Register (IO).....................................................................................80 4.2.3.2. TMRSTS—Timer Status Registers (IO) .......................................................................................82 |
Podobny numer części - FW82371 |
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Podobny opis - FW82371 |
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