8XC51FX

All parameter values apply to all devices unless otherwise indicated (Continued)

Symbol

Parameter

Min

Typical

Max

Units

Test Conditions

(Note 4)

Input leakage Current (Port 0)

g

10

m

Logical 1 to 0 Transition Current

(Ports 1 2 and 3)

Express

b

750

m

A

Commercial

b

650

RRST

RST Pulldown Resistor

40

225

KX

CIO

Pin Capacitance

10

pF

1MHz 25 C

Power Supply Current

(Note 3)

Active Mode

At 12 MHz (Figure 5)

15

30

mA

At 16 MHz

20

38

mA

At 24 MHz

28

56

mA

At 33 MHz

35

56

mA

Idle Mode

At 12 MHz (Figure 5)

5

75

mA

At 16 MHz

6

95

mA

At 24 MHz

7

135

mA

At 33 MHz

7

15

mA

Power Down Mode

5

75

m

A

NOTES

Ports 1 2 and 3 The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins

change from 1 to 0 In applications where capacitance loading exceeds 100 pF the noise pulses on these signals may

exceed 08V It may be desirable to qualify ALE or other signals with a Schmitt Trigger or CMOS-level input logic

address lines are stabilizing

4 Typicals are based on limited number of samples and are not guaranteed The values listed are at room temperature and 5V

10 mA

Port 0

26 mA

Ports 1 2 and 3

15 mA

71 mA

than the listed test conditions

272322 – 5

Note

9