8-9

FIGURE 5. TYPICAL APPLICATION WITH DC-COUPLED INPUT AND OUTPUT, AND OFFSET ADJUST. OUTPUT VOLTAGE IS

FIXED BY THE V+ AND V- RANGE. (DIP PINOUT)

FIGURE 6A. GATED OUTPUT FOR V+ = +12V ENABLE = HIGH, CONTROL B = C = LOW, CONTROL A = 10V PULSE. THE BURST

OUTPUT IS DELAYED

FIGURE 6B. STANDARD NTS COLOR BAR

FIGURE 6C. UNIFORM STEP SIGNAL WITH 3.58MHz MODULATION

FIGURE 6. PERFORMANCE OF CIRCUIT IN FIGURE 5

15pF

10K

10K (NOTE)

OFF SET

ADJ.

V-

V+

V+

+

1K

OUTPUT

AMP

10K

10K

GEN

IN 1

V-

1K

BIAS

REG

V- +5V

8

510

Ω

75

Ω

9

5

15

14

TG-1

V- = -5V

3

4

2

LED

LED

LED

LED

AB

C

ENABLE

GND

2

1.2K

1.2K

1.2K

1.2K

1

3

6

7

75

Ω

12

11

IN 2

IN 3

IN 4

IN 5

17

13

18

10

4

16

LLC

ENABLE

AND

SELECT

CHAN 1-4

TG-2

TG-4

TG-3

TG-5

75

Ω

75

Ω

75

Ω

75

Ω

NOTE: Adjust offset for voltage at

pin 9 equal to 0V with no AC signal

and one channel “ON”. Dynamic

clamping may be accomplished by

error current feedback to pin 8.

1

10V

+1

0

-1

10

0

1

µs/DIV.

10

µs/DIV.

10

µs/DIV.

CA3256