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CD4724BMS Arkusz danych(PDF) 6 Page - Intersil Corporation

Numer części CD4724BMS
Szczegółowy opis  CMOS 8-Bit Addressable Latch
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Producent  INTERSIL [Intersil Corporation]
Strona internetowa  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

CD4724BMS Arkusz danych(HTML) 6 Page - Intersil Corporation

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Specifications CD4724BMS
Logic Diagram
FIGURE 1. LOGIC DIAGRAM OF CD4724BMS AND DETAIL OF 1 OF 8 LATCHES
Static Burn-In 2
Note 1
4 - 7, 9 - 12
8
1 - 3, 13 - 16
Dynamic Burn-
In Note 1
-
1 - 3, 8
16
4 - 7, 9 - 12
14, 15
13
Irradiation
Note 2
4 - 7, 9 - 12
8
1 - 3, 13 - 16
NOTES:
1. Each pin except VDD and GND will have a series resistor of 10K
± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K
± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,
VDD = 10V
± 0.5V
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
FUNCTION
OPEN
GROUND
VDD
9V
± -0.5V
OSCILLATOR
50kHz
25kHz
LATCH
0
p
n
p
n
D
WD
R
LATCH
1
D
WD
R
LATCH
2
D
WD
R
LATCH
3
D
WD
R
LATCH
4
D
WD
R
LATCH
5
D
WD
R
LATCH
6
D
WD
R
LATCH
7
D
WD
R
4
5
6
7
9
10
11
12
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
A0
A1
A2
A0
A1
A2
A0
A1
A2
A0
A1
A2
A0
A1
A2
A0
A1
A2
A0
A1
A2
A0
A1
A2
A0
A0
A1
A1
A2
A2
D
WD
R
1
2
3
13
14
15
A0
A1
A2
DATA
WRITE
DISABLE
RESET
*
*
*
*
*
*
Q
R
ADDRESS
WD
DATA
VDD
VSS
*ALL INPUTS ARE
PROTECTED BY
COS/MOS PROTECTION
NETWORK
VSS = 8
VDD = 16


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