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ADG792G Arkusz danych(PDF) 7 Page - Analog Devices

Numer części ADG792G
Szczegółowy opis  Wide Bandwidth, Triple 4:1 Multiplexer
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Strona internetowa  http://www.analog.com
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ADG792G Arkusz danych(HTML) 7 Page - Analog Devices

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ADG792A/ADG792G
Rev. 0 | Page 7 of 24
I2C TIMING SPECIFICATIONS
VDD = 2.7 V to 5.5 V; GND = 0 V; TA = −40°C to +85°C, unless otherwise noted. See Figure 2 for timing diagram.
Table 3.
Parameter1
Conditions
Min
Max
Unit
Description
fSCL
Standard mode
100
kHz
Serial clock frequency
Fast mode
400
kHz
High speed mode
CB = 100 pF max
3.4
MHz
CB = 400 pF max
1.7
MHz
t1
Standard mode
4
μs
tHIGH, SCL high time
Fast mode
0.6
μs
High speed mode
CB = 100 pF max
60
ns
CB = 400 pF max
120
ns
t2
Standard mode
4.7
μs
tLOW, SCL low time
Fast mode
1.3
μs
High speed mode
CB = 100 pF max
160
ns
CB = 400 pF max
320
ns
t3
Standard mode
250
ns
tSU;DAT, data setup time
Fast mode
100
ns
High speed mode
10
ns
t42
Standard mode
0
3.45
μs
tHD;DAT, data hold time
Fast mode
0
0.9
μs
High speed mode
CB = 100 pF max
0
703
ns
CB = 400 pF max
0
150
ns
t5
Standard mode
4.7
μs
tSU;STA, setup time for a repeated start condition
Fast mode
0.6
μs
High speed mode
160
ns
t6
Standard mode
4
μs
tHD;STA, hold time (repeated) start condition
Fast mode
0.6
μs
High speed mode
160
ns
t7
Standard mode
4.7
μs
tBUF, bus free time between a stop and a start condition
Fast mode
1.3
μs
t8
Standard mode
4
μs
tSU;STO, setup time for stop condition
Fast mode
0.6
μs
High speed mode
160
ns
t9
Standard mode
1000
ns
tRDA, rise time of SDA signal
Fast mode
20 + 0.1 CB
B
300
ns
High speed mode
CB = 100 pF max
10
80
ns
CB = 400 pF max
20
160
ns
t10
Standard mode
300
ns
tFDA, fall time of SDA signal
Fast mode
20 + 0.1 CB
B
300
ns
High speed mode
CB = 100 pF max
10
80
ns
CB = 400 pF max
20
160
ns
t11
Standard mode
1000
ns
tRCL, rise time of SCL signal
Fast mode
20 + 0.1 CB
B
300
ns
High speed mode
CB = 100 pF max
10
40
ns
CB = 400 pF max
20
80
ns


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