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ADG902 Arkusz danych(PDF) 4 Page - Analog Devices

Numer części ADG902
Szczegółowy opis  1.65 V to 2.75 V, SPST Switches
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ADG902 Arkusz danych(HTML) 4 Page - Analog Devices

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ADG901/ADG902
Rev. B | Page 3 of 16
SPECIFICATIONS
VDD = 1.65 V to 2.75 V, GND = 0 V, input power = 0 dBm, all specifications TMIN to TMAX, unless otherwise specified.1
Table 1.
B Version
Parameter
Symbol
Conditions
Min
Typ2
Max
Unit
AC ELECTRICAL CHARACTERISTICS
Operating Frequency3
DC
2.5
GHz
−3 dB Frequency4
4.5
GHz
Input Power4
0 V dc bias
7
dBm
0.5 V dc bias
16
dBm
Insertion Loss
S21, S12
DC to 100 MHz; VDD = 2.5 V ± 10%
0.4
0.7
dB
500 MHz; VDD = 2.5 V ± 10%
0.5
0.8
dB
1000 MHz; VDD = 2.5 V ± 10%
0.8
1.25
dB
Isolation—RF1 to RF2
S21, S12
100 MHz
60
61
dB
CP Package
500 MHz
43
45
dB
1000 MHz
34
40
dB
Isolation—RF1 to RF2
S21, S12
100 MHz
51
60
dB
RM Package
500 MHz
37.5
47
dB
1000 MHz
31
37
dB
Return Loss (On Channel)4
S11, S22
DC to 100 MHz
20
28
dB
500 MHz
23
29
dB
1000 MHz
25
28
dB
Return Loss (Off Channel)4
S11, S22
DC to 100 MHz
18
23
dB
500 MHz
17
21
dB
1000 MHz
15
19
dB
On Switching Time4
tON
50% CTRL to 90% RF
3.6
6
ns
Off Switching Time4
tOFF
50% CTRL to 10% RF
5.8
9.5
ns
Rise Time4
tRISE
10% to 90% RF
3.1
5.5
ns
Fall Time4
tFALL
90% to 10% RF
6.0
8.5
ns
1 dB Compression4
P−1 dB
B
1000 MHz
17
dBm
Third-Order Intermodulation Intercept
IP3
900 MHz/901 MHz, 4 dBm
28.5
36
dBm
Video Feedthrough5
2.5
mV p-p
DC ELECTRICAL CHARACTERISTICS
Input High Voltage
VINH
VDD = 2.25 V to 2.75 V
1.7
V
VINH
VDD = 1.65 V to 1.95 V
0.65 VDD
V
Input Low Voltage
VINL
VDD = 2.25 V to 2.75 V
0.7
V
VINL
VDD = 1.65 V to 1.95 V
0.35
VDD
V
Input Leakage Current
II
0 ≤ VIN ≤ 2.75 V
±0.1
±1
μA
CAPACITANCE4
RF1/RF2, RF Port On Capacitance
CRF on
f = 1 MHz
1.2
pF
CTRL Input Capacitance
CCTRL
f = 1 MHz
2.1
pF
POWER REQUIREMENTS
VDD
1.65
2.75
V
Quiescent Power Supply Current
IDD
Digital inputs = 0 V or VDD
0.1
1
μA
1 Temperature range for B version: −40°C to +85°C.
2 Typical values are at VDD = 2.5 V and 25°C, unless otherwise specified.
3 Point at which insertion loss degrades by 1 dB.
4 Guaranteed by design, not subject to production test.
5 The dc transience at the output of any port of the switch when the control voltage is switched from high to low or low to high in a 50 Ω test setup, measured with 1 ns
rise time pulses and 500 MHz bandwidth.


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