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ADM2023 Arkusz danych(PDF) 7 Page - Analog Devices |
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ADM2023 Arkusz danych(HTML) 7 Page - Analog Devices |
7 / 16 page ADM202E/ADM1181A Rev. C | Page 7 of 16 ESD/EFT TRANSIENT PROTECTION SCHEME The ADM202E/ADM1181A use protective clamping structures on all inputs and outputs to clamp the voltage to a safe level and dissipate the energy present in electrostatic (ESD) and electrical fast transients (EFT) discharges. A simplified schematic of the protection structure is shown in Figure 8 and Figure 9. Each input and output contains two back-to-back high speed clamping diodes. During normal operation with maximum RS-232 signal levels, the diodes have no effect because one or the other is reverse biased depending on the polarity of the signal. However, if the voltage exceeds about 50 V in either direction, reverse breakdown occurs and the voltage is clamped at this level. The diodes are large p-n junctions that are designed to handle instantaneous current surges that exceed several amperes. The transmitter outputs and receiver inputs have a similar protection structure. The receiver inputs can dissipate some of the energy through the internal 5 kΩ resistor to GND, as well as through the protection diodes. The protection structure achieves ESD protection up to ±15 kV and EFT protection up to ±2 kV on all RS-232 I/O lines. The methods used to test the protection scheme are discussed in the ESD Testing (IEC1000-4-2) and Fast Transient/Burst Testing (IEC1000-4-4) sections. RIN RX D1 D2 RECEIVER INPUT R1 Figure 8. Receiver Input Protection Scheme RX D1 D2 TRANSMITTER OUTPUT TOUT Figure 9. Transmitter Output Protection Scheme |
Podobny numer części - ADM2023_15 |
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Podobny opis - ADM2023_15 |
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