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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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ADSP-BF544 Arkusz danych(PDF) 2 Page - Analog Devices |
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ADSP-BF544 Arkusz danych(HTML) 2 Page - Analog Devices |
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2 / 102 page  Rev. E | Page 2 of 102 | March 2014 ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549 TABLE OF CONTENTS Features ................................................................. 1 Memory ................................................................ 1 Peripherals ............................................................. 1 General Description ................................................. 3 Low Power Architecture ......................................... 4 System Integration ................................................ 4 Blackfin Processor Peripherals ................................. 4 Blackfin Processor Core .......................................... 4 Memory Architecture ............................................ 6 DMA Controllers .................................................. 9 Real-Time Clock ................................................. 10 Watchdog Timer ................................................ 10 Timers ............................................................. 10 Up/Down Counter and Thumbwheel Interface .......... 11 Serial Ports (SPORTs) .......................................... 11 Serial Peripheral Interface (SPI) Ports ...................... 11 UART Ports (UARTs) .......................................... 11 Controller Area Network (CAN) ............................ 12 TWI Controller Interface ...................................... 12 Ports ................................................................ 12 Pixel Compositor (PIXC) ...................................... 13 Enhanced Parallel Peripheral Interface (EPPI) ........... 13 USB On-the-Go Dual-Role Device Controller ............ 13 ATA/ATAPI-6 Interface ....................................... 14 Keypad Interface ................................................. 14 Secure Digital (SD)/SDIO Controller ....................... 14 Code Security .................................................... 14 Media Transceiver MAC Layer (MXVR) .................. 14 Dynamic Power Management ................................ 15 Voltage Regulation .............................................. 16 Clock Signals ...................................................... 17 Booting Modes ................................................... 18 Instruction Set Description .................................... 21 Development Tools .............................................. 21 MXVR Board Layout Guidelines ............................. 22 Additional information ......................................... 23 Related Signal Chains ........................................... 23 Lockbox Secure Technology Disclaimer .................... 23 Pin Descriptions .................................................... 24 Specifications ........................................................ 34 Operating Conditions ........................................... 34 Electrical Characteristics ....................................... 36 Absolute Maximum Ratings ................................... 40 ESD Sensitivity ................................................... 41 Package Information ............................................ 41 Timing Specifications ........................................... 42 Output Drive Currents ......................................... 88 Test Conditions .................................................. 90 Capacitive Loading .............................................. 90 Typical Rise and Fall Times ................................... 91 Thermal Characteristics ........................................ 93 400-Ball CSP_BGA Package ...................................... 94 Outline Dimensions .............................................. 100 Surface-Mount Design ........................................ 100 Automotive Products ............................................ 101 Ordering Guide ................................................... 101 REVISION HISTORY 03/14—Rev. D to Rev. E Updated Development Tools .................................... 21 Corrected SPI2 pin count in Port B configuration in Pin Multiplexing .................................................... 24 Corrected typographical error of parameter name in External DMA Request Timing ................................. 58 Added note to Table 42 in Serial Ports—Enable and Three-State .......................... 63 Corrected tWL and tWH minimum specifications from tSCLK +1 to 1 × tSCLK in Timer Cycle Timing ................................. 69 Added/changed package dimensions to Figure 88 in Outline Dimensions .............................................. 100 Added low Alpha Package model to Ordering Guide ..... 101 |
Podobny numer części - ADSP-BF544_15 |
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Podobny opis - ADSP-BF544_15 |
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