Zakładka z wyszukiwarką danych komponentów |
|
ADSP-BF538F Arkusz danych(PDF) 1 Page - Analog Devices |
|
ADSP-BF538F Arkusz danych(HTML) 1 Page - Analog Devices |
1 / 60 page Blackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc. Blackfin Embedded Processor ADSP-BF538/ADSP-BF538F Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A. Tel: 781.329.4700 ©2013 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES Up to 533 MHz high performance Blackfin processor Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs, 40-bit shifter RISC-like register and instruction model for ease of programming and compiler friendly support Advanced debug, trace, and performance monitoring Wide range of operating voltages (see Operating Conditions on Page 23) Programmable on-chip voltage regulator 316-ball Pb-free CSP_BGA package MEMORY Up to 148K bytes of on-chip memory (see Table 1 on Page 3) Optional 8M bit parallel flash with boot option Memory management unit providing memory protection External memory controller with glueless support for SDRAM, SRAM, flash, and ROM Flexible memory booting options from SPI and external memory PERIPHERALS Parallel peripheral interface (PPI) supporting ITU-R 656 video data formats 4 dual-channel, full-duplex synchronous serial ports, supporting 16 stereo I2S channels 2 DMA controllers supporting 26 peripheral DMAs 4 memory-to-memory DMAs Controller area network (CAN) 2.0B controller 3 SPI-compatible ports Three 32-bit timer/counters with PWM support 3 UARTs with support for IrDA 2 TWI controllers compatible with I2C industry standard Up to 54 general-purpose I/O pins (GPIO) Real-time clock, watchdog timer, and 32-bit core timer On-chip PLL capable of frequency multiplication Debug/JTAG interface Figure 1. Functional Block Diagram B UART0 SPORT0-1 WATCHDOG TIMER RTC SPI0 TIMER0-2 PPI SPI1-2 SPORT2-3 UART 1-2 GPIO PORT F GPIO PORT D GPIO PORT C GPIO PORT E EXTERNAL PORT FLASH, SDRAM CONTROL BOOT ROM JTAG TEST AND EMULATION VOLTAGE REGULATOR DMA CONTROLLER0 L1 INSTRUCTION MEMORY L1 DATA MEMORY INTERRUPT CONTROLLER PERIPHERAL ACCESS BUS DMA CORE BUS 0 DMA EXTERNAL BUS 1 TWI0-1 CAN 2.0B GPIO 8M BIT P ARALLEL FLASH (SEE TABLE 1) DMA CONTROLLER1 DMA CORE BUS 1 DMA EXTERNAL BUS 0 16 |
Podobny numer części - ADSP-BF538F_15 |
|
Podobny opis - ADSP-BF538F_15 |
|
|
Link URL |
Polityka prywatności |
ALLDATASHEET.PL |
Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |