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ADV7197 Arkusz danych(PDF) 9 Page - Analog Devices

Numer części ADV7197
Szczegółowy opis  Multiformat HDTV Encoder with Three 11-Bit DACs
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ADV7197
–9–
PIN FUNCTION DESCRIPTIONS
Pin
Mnemonic
Input/Output
Function
1, 12
VDD
P
Digital Power Supply.
2–11
Y0–Y9
I
10-Bit HDTV Input Port for Y Data. G data input in RGB mode.
13, 52
GND
G
Digital Ground
14–23
Cr0–Cr9
I
10-Bit HDTV Input Port for Color Data in 4:4:4 Input Mode. In 4:2:2 mode this
input port is not used. R data input in RGB mode.
24, 35
VAA
P
Analog Power Supply.
25
CLKIN
I
Pixel Clock Input. Requires a 74.25 MHz (74.1758 MHz) reference clock.
26, 33
AGND
G
Analog Ground
27
DV
I
Video Blanking Control Signal Input.
28
VSYNC/
I
VSYNC, vertical sync control signal input or TSYNC input control signal in
TSYNC
Async Timing Mode.
29
HSYNC/
SYNC
I
HSYNC, horizontal sync control signal input or SYNC input control signal in
Async Timing Mode.
30
SCL
I
MPU Port Serial Interface Clock Input.
31
SDA
I/O
MPU Port Serial Data Input/Output.
32
DAC C
O
Color component analog output of input data on Cb/Cr9–0 input pins.
34
DAC A
O
Y Analog Output.
36
DAC B
O
Color component analog output of input data on Cr9–Cr0 input pins.
37
COMP
O
Compensation Pin for DACs. Connect 0.1
µF Capacitor from COMP pin to VAA.
38
RSET
I
A 2470
Ω resistor (for input ranges 64–940 and 64–960, output standards
EIA-770.3) must be connected from this pin to ground and is used to control the
amplitudes of the DAC outputs. For input ranges 0–1023 (output standards
RS-170, RS-343A) the RSET value must be 2820
Ω.
39
VREF
I/O
Optional External Voltage Reference Input for DACs or Voltage Reference
Output (1.235 V).
40
RESET
I
This input resets the on-chip timing generator and sets the ADV7197 into Default
Register setting. Reset is an active low signal.
41
ALSB
I
TTL Address Input. This signal sets up the LSB of the MPU address. When this
pin is tied high, the I
2C filter is activated which reduces noise on the I2C interface.
When this pin is tied low, the input bandwidth on the I
2C interface is increased.
42–51
Cb/Cr9–0
I
10-Bit HDTV Input Port for Color Data. In 4:2:2 mode the multiplexed CrCb
data must be input on these pins. B data input in RGB mode.


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