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CDCL1810A Arkusz danych(PDF) 3 Page - Texas Instruments |
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CDCL1810A Arkusz danych(HTML) 3 Page - Texas Instruments |
3 / 30 page CDCL1810A www.ti.com SLLSEL1 – NOVEMBER 2014 6 Device Comparison Tables Table 1. TA Device Comparison TA PACKAGED DEVICES FEATURES –40°C to +85°C 48-pin VQFN (RGZ) Package, CDCL1810ARGZT small tape and reel –40°C to +85°C 48-pin VQFN (RGZ) Package, CDCL1810ARGZR tape and reel Table 2. Device Feature Comparison FEATURE CDCL1810 CDCL1810A Divider Synchronization after power up and after each programming access. During Synchronization all outputs Yes No are disabled. Output Group Phase Adjustment Yes No Device Revision ID b’011’ b’100’ 1:10 Clock Fanout Yes Yes Outputs grouped into two divider banks Yes Yes Individual Output enabled/disable with I2C Yes Yes Continuous and independent operation of outputs which are not programmed, while configuring and programming No Yes other outputs. Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: CDCL1810A |
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