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CDCL1810ARGZR Arkusz danych(PDF) 6 Page - Texas Instruments |
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CDCL1810ARGZR Arkusz danych(HTML) 6 Page - Texas Instruments |
6 / 30 page CDCL1810A SLLSEL1 – NOVEMBER 2014 www.ti.com 8 Specifications 8.1 Absolute Maximum Ratings (1) Over operating free-air temperature range (unless otherwise noted). MIN MAX UNIT VDD, AVDD Supply voltage(2) –0.3 2.5 V VLVDS Voltage range at LVDS input pins(2) –0.3 VDD+0.6 V VI Voltage range at all non-LVDS input pins(2) –0.3 VDD+0.6 V TJ Junction temperature +125 °C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating condition is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to network ground terminal. 8.2 Handling Ratings MIN MAX UNIT Tstg Storage temperature range –65 +150 °C Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all 2000 pins(1) V(ESD) Electrostatic discharge V Charged device model (CDM), per JEDEC specification 500 JESD22-C101, all pins(2) (1) JEDEC document JEP155 states that 2000-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 500-V CDM allows safe manufacturing with a standard ESD control process. 8.3 Recommended Operating Conditions Over operating free-air temperature range (unless otherwise noted). MIN NOM MAX UNIT VDD Digital supply voltage 1.7 1.8 1.9 V AVDD Analog supply voltage 1.7 1.8 1.9 V TA Ambient temperature (no airflow, no heatsink) –40 +85 °C TJ Junction temperature +105 °C 8.4 Thermal Information CDCL1810A THERMAL METRIC(1) RGZ UNIT 48 PINS 28.3, Airflow = 0 LFM RθJA Junction-to-ambient thermal resistance(2). 22.4, Airflow = 50 LFM °C/W RθJC(top) Junction-to-case (top) thermal resistance 20.5 RθJC(bot) Junction-to-case (bottom) thermal resistance 5.3 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. (2) No heatsink; power uniformly distributed; 36 ground vias (6 x 6 array) tied to the thermal exposed pad; 4-layer high-K board. 6 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: CDCL1810A |
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