TS331 datasheet(2/5 Pages) TSC

Numer części	TS331

Szczegółowy opis	Low Power Low Offset Voltage Comparators

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Producent	TSC [Taiwan Semiconductor Company, Ltd]

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TS331

Low Power Low Offset Voltage Comparators

2/5

Version: B14

Electrical Characteristics (VCC=5V, TA=25oC; unless otherwise specified.)

Characteristics

Symbol

Min

Typ

Max

Unit

Input Offset Voltage (note 3)

VIO

--

2

5

mV

Input Offset Current, IIN(+) - IIN(-), VCM=0V

IIO

--

50

nA

Input Offset Current (note 4), IIN(+) - IIN(-), VCM=0V

IIB

--

250

nA

Input Common Mode Voltage Range, Vcc=30V

VICR

-0

--

VCC-1.5

V

Voltage Gain, RL ≥15K, Vcc=15V, Vo=1V~11V

AVOL

50

200

--

V/mV

Large Signal Response Time

Vin=TTL Logic Swing. Vref = 1.4V, VRL=5V. RL=5.1KΩ

--

300

--

nS

Response Time (note 6), VRL=5V. RL=5.1KΩ

tTLH

--

1.3

--

uS

Output Sink Current, VIN(-)=1V, VIN(+)=0V, Vo≤1.5V

ISINK

6.0

16

--

mA

Output Saturation Voltage,

VIN(-)=1V, VIN(+)=0V, ISINK≤4mA

VOL

--

250

400

mV

Output Leakage Current, VIN(-)=0V, VIN(+)=1V, Vo=5V

IOL

--

0.1

--

nA

Supply Current

RL = ∞, VCC =5V

RL = ∞, VCC =36V

Icc

--

0.4

1.0

2.5

mA

Note 1. The max. Output current may be as high as 20mA, independent of the magnitude of VCC, output short

circuits to VCC can cause excessive heating and eventual destruction.

Note 2. This magnitude of input current will only occur if the input leads are driven more negative than ground or

the negative supply voltage. This is due to the input PNP collector base junction becoming forward biased

acting as an input clamp diode. There is also a lateral PNP parasitic transistor action on the IC chip. This

phenomena can cause the output voltage of the comparators to go to the VCC voltage level (or ground if

overdrive is large) during the time the input is driven negative. This will not destroy the device and normal

output states will recover when the inputs become -0.3V of ground or negative supply.

Note 3. At output switch point, VO=1.4Vdc, RS=0Ω with VCC from 5Vdc to 30Vdc, and over the full input common-

mode

Note 4. Due to the PNP transistor inputs, bias current will flow out of the inputs, this current is essentially constant

independent of the output state, therefore, no loading changes will exist on the input lines.

Note 5. Input common mode of either input should not be permitted to go more than 0.3V negative of ground or

minus supply. The upper limit of common mode range is VCC - 1.5V but either or both inputs can betaken

to as high as 30volts without damage.

Note 6. Response time is specified with a 100mV step and 5.0mV of overdrive. With larger magnitudes of

overdrive faster response times are obtainable.

Application information

This comparator feature high gain, wide bandwidth characteristics. This gives the device oscillation tendencies if

the outputs are capacitive coupled to the inputs via stray capacitance. This oscillation manifests itself during

output transitions (VOL to VOH). To alleviate this situation input resistors<10KΩ should be used. The addition of

positive feedback (<10 mV) is also recommended.

It is good design practice to ground all unused pins. Differential input voltages may be larger than supply voltage

without damaging the comparator's inputs. Voltages more negative than -0.3V should not be used.

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