Hi Dyn Range 2 Channel IF Amp w/Pwr Cntrl, 100 - 400 MHz

AM55-0024

Specifications subject to change without notice.

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V 2.00

External Components

1, 2, 3

2

Typical Performance Curves

Component

Value

L

470 nH

C

10000 pF

1. All inductors are 470 nH

2. All Capacitors are 10000 pF

3. IF outputs must be supplied +3 Volts.

Clock Diagram

1, 2, 3, 4, 5

1. Max Clock Speed = 40 MHz

2. Ton = Toff

3. Tsu = >3ns

4. Thold = >7ns

5. Data clocked in on rising clock edge

Data

Clock

Each channel in the AM55-0024 is independently

controllable with a 3 wire serial interface: Clock, Data,

and Latch Enable. These lines can be shared based on

application requirements.

The attenuator within the

device is controlled with a 6 bit word, enabling the

selection of 64 possible states. The highest gain state is

'000000', and the lowest is '111111'. The sequence for

shifting the data is as follows: Present data (MSB first),

strobe clock, repeat until 6 bits have been presented and

clocked, then strobe the latch enable line, which

implements the state change.

Serial Interface

1.0

1.5

2.0

2.5

3.0

3.5

0.045

0.105

0.165

0.225

0.285

0.345

0.405

Frequency (GHz)

1.0

1.5

2.0

2.5

3.0

3.5

0.045

0.105

0.165

0.225

0.285

0.345

0.405

Frequency (GHz)

AM55-0024

3V

A1

3V

A2

3V

B1

3V

B2

IF In A

IF In B

IF Out A

3V A3

IF Out B

3V B3

Latch