IRF7904PbF-1

4

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May 19, 2014

Q1 - Control FET

Q2 - Synchronous FET

Typical Characteristics

Fig 7. Typical Capacitance vs. Drain-to-Source Voltage Fig 8. Typical Capacitance vs. Drain-to-Source Voltage

Fig 9. Typical Gate Charge vs. Gate-to-Source Voltage

Fig 10. Typical Gate Charge vs. Gate-to-Source

Voltage

Fig 11. Maximum Safe Operating Area

Fig 12. Maximum Safe Operating Area

1

10

100

VDS, Drain-to-Source Voltage (V)

10

100

1000

10000

Coss

Crss

Ciss

VGS = 0V,

f = 1 MHZ

Ciss = Cgs + Cgd, Cds SHORTED

Crss = Cgd

Coss = Cds + Cgd

1

10

100

VDS, Drain-to-Source Voltage (V)

100

1000

10000

Coss

Crss

Ciss

VGS = 0V,

f = 1 MHZ

Ciss = Cgs + Cgd, Cds SHORTED

Crss = Cgd

Coss = Cds + Cgd

0

5

10

15

20

QG Total Gate Charge (nC)

0

2

4

6

8

10

12

VDS= 24V

VDS= 15V

ID= 6.1A

0

5

10

15

20

25

30

35

QG Total Gate Charge (nC)

0

2

4

6

8

10

12

VDS= 24V

VDS= 15V

ID= 8.8A

0.01

0.10

1.00

10.00

100.00

VDS , Drain-toSource Voltage (V)

0.01

0.1

1

10

100

1000

TA = 25°C

Tj = 150°C

Single Pulse

1msec

10msec

OPERATION IN THIS AREA

LIMITED BY R DS(on)

100μsec

100msec

0.01

0.10

1.00

10.00

100.00

VDS , Drain-toSource Voltage (V)

0.01

0.1

1

10

100

1000

TA = 25°C

Tj = 150°C

Single Pulse

1msec

10msec

OPERATION IN THIS AREA

LIMITED BY R DS(on)

100μsec

100msec