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74AUP1G17 Arkusz danych(PDF) 1 Page - NXP Semiconductors

Numer części 74AUP1G17
Szczegółowy opis  Low-power Schmitt trigger
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Producent  PHILIPS [NXP Semiconductors]
Strona internetowa  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74AUP1G17 Arkusz danych(HTML) 1 Page - NXP Semiconductors

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1.
General description
The 74AUP1G17 provides the single Schmitt trigger buffer. It is capable of transforming
slowly changing input signals into sharply defined, jitter-free output signals.
This device ensures a very low static and dynamic power consumption across the entire
VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial Power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
The inputs switch at different points for positive and negative-going signals. The difference
between the positive voltage VT+ and the negative voltage VT is defined as the input
hysteresis voltage VH.
2.
Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; ICC = 0.9 A (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial Power-down mode operation
Multiple package options
Specified from
40 Cto+85 C and 40 Cto+125 C
74AUP1G17
Low-power Schmitt trigger
Rev. 8 — 15 January 2015
Product data sheet


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