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ADC14155W-MLS Arkusz danych(PDF) 1 Page - Texas Instruments

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Numer części ADC14155W-MLS
Szczegółowy opis  ADC14155QML 14-Bit, 155 MSPS, 1.1 GHz Bandwidth A/D Converter
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Strona internetowa  http://www.ti.com
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ADC14155W-MLS Arkusz danych(HTML) 1 Page - Texas Instruments

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ADC14155QML-SP
www.ti.com
SNAS378I – NOVEMBER 2008 – REVISED MARCH 2013
ADC14155QML 14-Bit, 155 MSPS, 1.1 GHz Bandwidth A/D Converter
1
FEATURES
DESCRIPTION
The ADC14155 is a high-performance CMOS analog-
2
Total Ionizing Dose 100 krad(Si)
to-digital converter capable of converting analog input
Single Event Latch-up 120 MeV-cm2/mg
signals into 14-bit digital words at rates up to 155
1.1 GHz Full Power Bandwidth
Mega Samples Per Second (MSPS). This converter
uses a differential, pipelined architecture with digital
Internal Sample-and-hold Circuit
error correction and an on-chip sample-and-hold
Low Power Consumption
circuit to minimize power consumption and the
Internal Precision 1.0V Reference
external component count, while providing excellent
dynamic performance. A unique sample-and-hold
Single-ended or Differential Clock Modes
stage yields a full-power bandwidth of 1.1 GHz. The
Data Ready Output Clock
ADC14155 operates from dual +3.3V and +1.8V
Clock Duty Cycle Stabilizer
power supplies and consumes 967 mW of power at
155 MSPS.
Dual +3.3V and +1.8V Supply Operation (+/-
10%)
The separate +1.8V supply for the digital output
Power-down Mode
interface allows lower power operation with reduced
noise. A power-down feature reduces the power
Offset Binary or 2's Complement Output Data
consumption to 5 mW with the clock input disabled,
Format
while still allowing fast wake-up time to full operation.
48-pin CFP Package, (11.5mm x 11.5mm,
The differential inputs provide a full scale differential
0.635mm pin-pitch)
input swing equal to 2 times the reference voltage. A
stable 1.0V internal voltage reference is provided, or
KEY SPECIFICATIONS
the ADC14155 can be operated with an external
Resolution 14 Bits
reference.
Conversion Rate 155 MSPS
The Clock mode (differential versus single-ended)
SNR (fIN = 70 MHz) 70.1 dBFS (typ)
and output data format (offset binary versus 2's
complement)
are
pin-selectable.
A
duty
cycle
SFDR (fIN = 70 MHz) 82.3 dBFS (typ)
stabilizer maintains performance over a wide range of
ENOB (fIN = 70 MHz) 11.3 bits (typ)
clock duty cycles.
Full Power Bandwidth 1.1 GHz (typ)
The ADC14155 is available in a 48-lead thermally
Power Consumption 967 mW (typ)
ehanced mult-layer ceramic quad package and
operates over the military temperature range of -55°C
APPLICATIONS
to +125°C.
High IF Sampling Receivers
Power Amplifier Linearization
Multi-carrier, Multi-mode Receivers
Test and Measurement Equipment
Communications Instrumentation
Radar Systems
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2008–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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