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SL2980 Arkusz danych(PDF) 11 Page - Seiko Instruments Inc |
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SL2980 Arkusz danych(HTML) 11 Page - Seiko Instruments Inc |
11 / 23 page HIGH RIPPLE-REJECTION AND LOW DROPOUT CMOS VOLTAGE REGULATOR Rev.5.1_00 S-L2980 Series Seiko Instruments Inc. 11 Operation 1. Basic Operation Figure 11 shows the block diagram of the S-L2980 Series. The error amplifier compares the reference voltage (Vref) with feedback voltage (Vfb), which is the output voltage resistance-divided by feedback resistors (Rs and Rf). It supplies the gate voltage necessary to maintain the constant output voltage which is not influenced by the input voltage and temperature change, to the output transistor. *1 *1. Parasitic diode VSS Current supply − + Vfb Vref VIN VOUT Rf Rs Error amplifier Reference voltage circuit Figure 11 2. Output Transistor In the S-L2980 Series, a low on-resistance P-channel MOS FET is used as the output transistor. Be sure that VOUT does not exceed VIN + 0.3 V to prevent the voltage regulator from being damaged due to inverse current flowing from the VOUT pin through a parasitic diode to the VIN pin. |
Podobny numer części - SL2980 |
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Podobny opis - SL2980 |
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