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ISL29030IROZ-EVALZ Arkusz danych(PDF) 6 Page - Intersil Corporation |
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ISL29030IROZ-EVALZ Arkusz danych(HTML) 6 Page - Intersil Corporation |
6 / 17 page ISL29030 6 FN6872.1 November 12, 2012 Register Map There are ten 8-bit registers accessible via I2C. Registers 0x1 and 0x2 define the operation mode of the device. Registers 0x3 through 0x7 store the various ALS/IR/Prox thresholds which trigger interrupt events. Registers 0x8 through 0xA store the results of ALS/IR/Prox ADC conversions. TABLE 1. ISL29030 REGISTERS AND REGISTER BITS ADDR REG NAME BIT 7 654 321 0 DEFAULT 0x00 (n/a) (Reserved) (n/a) 0x01 CONFIGURE PROX EN PROX_SLP[2:0] PROX_DR ALS_EN ALS_RANGE ALSIR_MODE 0x00 0x02 INTERRUPT PROX_FLAG PROX_PRST[1:0] (Write 0) ALS_FLAG ALS_PRST[1:0] INT_CTRL 0x00 0x03 PROX_LT PROX_LT[7:0] 0x00 0x04 PROX_HT PROX_HT[7:0] 0xFF 0x05 ALSIR_TH1 ALSIR_LT[7:0] 0x00 0x06 ALSIR_TH2 ALSIR_HT[3:0] ALSIR_LT[11:8] 0xF0 0x07 ALSIR_TH3 ALSIR_HT[11:4] 0xFF 0x08 PROX_DATA PROX_DATA[7:0] 0x00 0x09 ALSIR_DT1 ALSIR_DATA[7:0] 0x00 0x0A ALSIR_DT2 (Unused) ALSIR_DATA[11:8] 0x00 0x0E TEST1 (Write as 0x00) 0x00 0x0F TEST2 (Write as 0x00) 0x00 FIGURE 1. I2C TIMING DIAGRAM |
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