LOGIC

OSC

+

-

TYPE III

COMP

+

-

1.285V

&

Soft-start

INT REG, EN, UVLO

GND

SW

BOOT

VIN

IADJ

FB

VIN

VOUT

Error Amp.

PWM Cmp.

ILimit

SS

LM22679, LM22679-Q1

SNVS581L – FEBRUARY 2013 – REVISED NOVEMBER 2014

www.ti.com

7 Detailed Description

7.1 Overview

The LM22679 incorporates a voltage mode constant frequency PWM architecture. In addition, input voltage feed-

forward is used to stabilize the loop gain against variations in input voltage. This allows the loop compensation to

be optimized for transient performance. The power MOSFET, in conjunction with the diode, produce a

rectangular waveform at the switch pin, that swings from about zero volts to VIN. The inductor and output

capacitor average this waveform to become the regulator output voltage. By adjusting the duty cycle of this

waveform, the output voltage can be controlled. The error amplifier compares the output voltage with the internal

reference and adjusts the duty cycle to regulate the output at the desired value.

The internal loop compensation of the -ADJ option is optimized for outputs of 5 V and below. If an output voltage

of 5 V or greater is required, the -5.0 option can be used with an external voltage divider. The minimum output

voltage is equal to the reference voltage, that is, 1.285 V (typ).

7.2 Functional Block Diagram

8

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