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ML2264CCP Arkusz danych(PDF) 6 Page - Micro Linear Corporation |
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ML2264CCP Arkusz danych(HTML) 6 Page - Micro Linear Corporation |
6 / 17 page ML2264 6 ELECTRICAL CHARACTERISTICS (Continued) Unless otherwise specified, TA = TMIN to TMAX, VCC = +VREF = 5V ± 5%, and –VREF = GND, and timing measured at 1.4V, CL = 100pF. (Note 1) ML2264XCX TYP PARAMETER NOTES CONDITIONS MIN (NOTE 3) MAX UNITS AC Performance Write-Read Mode (Pin 5 = 5V) Figures 5 and 6 (Continued) tINTL, Internal Comparison 4, 9 tRD > tINTL 620 ns Time — WR Rising Edge to INT Low tACC2, Data Access Time 4 tRD > tINTL 050 ns — RD to Data Valid tDH, Data Hold Time — 5, 9 Figure 3 0 50 ns RD Rising Edge to Data High Impedance State tINTH, RD to INT Delay 4, 9 0 65 ns tP, Delay Time Between 4, 9 Sample & Hold Mode, 300 ns Conversions — INT Low SH/TH = VCC to WR Low Track & Hold Mode, 240 ns SH/TH = GND tIHWR, WR to INT Delay 4, 9 Standalone Mode 0 90 ns tID, INTØ to Data Valid Delay 4, 9 Standalone Mode 0 20 ns Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions. Note 2: When the voltage at any pin exceeds the power supply rails (VIN < GND or VIN > VCC) the absolute value of current at that pin should be limited to 25mA or less. Note 3: Typicals are parametric norm at 25°C. Note 4: Parameter guaranteed and 100% production tested. Note 5: Parameter guaranteed. Parameters not 100% tested are not in outgoing quality level calculation. Note 6: Total unadjusted error includes offset, full scale, linearity, sample and hold, and multiplexer errors. Total unadjusted error is tested at the minimum specified times for WR, RD, tR1, and tP. For example, for the ML2264XCX in the sample and hold mode, WR/RD mode: tWR = 190ns, tRD = 275ns with a frequency of 1.000MHz (cycle time of 1000ns). Note 7: For –VREF • VIN the digital output code will be 0000 0000. Two on-chip diodes are tied to the analog input which will forward conduct for analog input voltages one diode drop below ground or one diode drop greater than the VCC supply. Be careful, during testing at low VCC levels (4.5V), as high level analog inputs (5V) can cause this input diode to conduct — especially at elevated temperatures, and cause errors for analog inputs near full scale. The spec allows 100mV forward bias of either diode. This means that as long as the analog VIN or VREF does not exceed the supply voltage by more than 100mV, the output code will be correct. To achieve an absolute 0VDC to 5VDC input voltage range will therefore require a minimum supply voltage of 4.900VDC over temperature variations, initial tolerance and loading. Note 8: Conversion time, write-read mode = tWR + tRD + tRI. Note 9: Defined from the time an output crosses 0.8V or 2.4V. |
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