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CS5166HGDWR16 Arkusz danych(PDF) 4 Page - ON Semiconductor

Numer części CS5166HGDWR16
Szczegółowy opis  5?묪it Synchronous CPU Controller with Power Good
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Producent  ONSEMI [ON Semiconductor]
Strona internetowa  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

CS5166HGDWR16 Arkusz danych(HTML) 4 Page - ON Semiconductor

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CS5166H
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ELECTRICAL CHARACTERISTICS (continued) (0°C < TA < 70°C; 0°C < TJ < 125°C; 8.0 V < VCC < 20 V; 2.0 DAC Code:
(VID4 = VID3 = VID2 = VID1 = 0, VID0 = 1), CGATE(H) = CGATE(L) = 3.3 nF; COFF = 330 pF; CSS = 0.1 μF, unless otherwise specified.)
Characteristic
Unit
Max
Typ
Min
Test Conditions
GATE(H) and GATE(L)
High Voltage at 100 mA
Measure VCC − GATE
1.2
2.0
V
Low Voltage at 100 mA
Measure GATE
1.0
1.5
V
Rise Time
1.6 V < GATE < (VCC − 2.5 V), 8.0 V < VCC < 14 V
40
80
ns
Fall Time
(VCC − 2.5 V) > GATE > 1.6 V, 8.0 V < VCC < 14 V
40
80
ns
GATE(H) to GATE(L) Delay
GATE(H) < 2.0 V; GATE(L) > 2.0 V,
8.0 V < VCC < 14 V
30
65
100
ns
GATE(L) to GATE(H) Delay
GATE(L) < 2.0 V; GATE(H) > 2.0 V,
8.0 V < VCC < 14 V
30
65
100
ns
GATE pull−down
Resistor to PGND, Note 3
20
50
115
Fault Protection
SS Charge Time
VFB = 3.0 V, VISENSE = 2.8 V
1.6
3.3
5.0
ms
SS Pulse Period
VFB = 3.0 V, VISENSE = 2.8 V
25
100
200
ms
SS Duty Cycle
(Charge Time/Period) × 100
1.0
3.3
6.0
%
SS COMP Clamp Voltage
VFB = 2.7 V; VSS = 0 V
0.50
0.95
1.10
V
VFB Low Comparator
Increase VFB till normal off−time
0.9
1.0
1.1
V
PWM Comparator
Transient Response
VFB = 1.2 to 5.0 V. 500 ns after GATE(H)
(after Blanking time) to GATE(H) = (VCC −1.0 V)
to 1.0 V, 8.0 V < VCC < 14 V
115
175
ns
Minimum Pulse Width
(Blanking Time)
Drive VFB 1.2 V to 5.0 V upon GATE(H) rising
edge (> VCC − 1.0 V), measure GATE(H) pulse
width, 8.0 V < VCC < 14 V
100
200
300
ns
COFF
Normal Off−Time
VFB = 2.7 V
1.0
1.6
2.3
μs
Extended Off−Time
VSS = VFB = 0 V
5.0
8.0
12.0
μs
Time−Out Timer
Time−Out Time
VFB = 2.7 V, Measure GATE(H) Pulse Width
10
30
50
μs
Fault Duty Cycle
VFB = 0V
30
50
70
%
Power Good Output
Low to High Delay
VFB = (0.8 × VDAC) to VDAC
30
65
110
μs
High to Low Delay
VFB = VDAC to (0.8 × VDAC)
30
75
120
μs
Output Low Voltage
VFB = 2.4 V, IPWRGD = 500 μA
0.2
0.3
V
Sink Current Limit
VFB = 2.4 V, PWRGD = 1.0 V
0.5
4.0
15.0
mA
3. Guaranteed by design, not 100% tested in production.


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