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LC717A10PJ Arkusz danych(PDF) 4 Page - ON Semiconductor |
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4 / 14 page LC717A10PJ No.A2214-4/14 I 2C Compatible Bus Timing Characteristics at VSS = 0, VDD = 2.6 to 5.5V, Ta = -40 to +105C *Not tested at low temperature before shipment Parameter Symbol Pin Name Conditions min typ max Unit Remarks SCL clock frequency fSCL SCL 400 kHz START condition hold time tHD;STA SCL SDA 0.6 s SCL clock low period tLOW SCL 1.3 s SCL clock high period tHIGH SCL 0.6 s Repeated START condition setup time tSU;STA SCL SDA 0.6 s *1 Data hold time tHD;DAT SCL SDA 00.9 s Data setup time tSU;DAT SCL SDA 500 ns 100 ns *1 SDA, SCL rise/fall time tr / tf SCL SDA 300 ns *1 STOP condition setup time tSU;STO SCL SDA 0.6 s STOP-to-START bus release time tBUF SCL SDA 2.5 s 1.3 s *1 *1) Design guarantee values (not tested before shipment) |
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