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MC74VHCT393A Arkusz danych(PDF) 3 Page - ON Semiconductor |
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MC74VHCT393A Arkusz danych(HTML) 3 Page - ON Semiconductor |
3 / 9 page MC74VHCT393A http://onsemi.com 3 MAXIMUM RATINGS* Symbol Parameter Value Unit VCC DC Supply Voltage – 0.5 to + 7.0 V VIN DC Input Voltage – 0.5 to + 7.0 V VOUT DC Output Voltage – 0.5 to VCC + 0.5 V IIK Input Diode Current − 20 mA IOK Output Diode Current ± 20 mA IOUT DC Output Current, per Pin ± 25 mA ICC DC Supply Current, VCC and GND Pins ± 75 mA PD Power Dissipation in Still Air, SOIC Packages† TSSOP Package† 500 450 mW Tstg Storage Temperature – 65 to + 150 _C * Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute−maximum−rated conditions is not implied. †Derating — SOIC Packages: – 7 mW/_C from 65_ to 125_C TSSOP Package: − 6.1 mW/_C from 65_ to 125_C RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit VCC DC Supply Voltage 2.0 5.5 V VIN DC Input Voltage 0 5.5 V VOUT DC Output Voltage 0 VCC V TA Operating Temperature − 55 + 125 _C tr, tf Input Rise and Fall Time VCC = 5.0 V ± 0.5 V 0 20 ns/V The qJA of the package is equal to 1/Derating. Higher junction temperatures may affect the expected lifetime of the device per the table and figure below. DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES Junction Temperature °C Time, Hours Time, Years 80 1,032,200 117.8 90 419,300 47.9 100 178,700 20.4 110 79,600 9.4 120 37,000 4.2 130 17,800 2.0 140 8,900 1.0 1 1 10 100 1000 TIME, YEARS FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR Figure 1. Failure Rate vs. Time Junction Temperature This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance cir- cuit. For proper operation, Vin and Vout should be constrained to the range GND v (Vin or Vout) v VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. |
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