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MTV32N25E Arkusz danych(PDF) 2 Page - ON Semiconductor

Numer części MTV32N25E
Szczegółowy opis  Power Field Effect Transistor
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MTV32N25E Arkusz danych(HTML) 2 Page - ON Semiconductor

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MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain−Source Voltage
VDSS
250
Vdc
Drain−Gate Voltage (RGS = 1.0 MΩ)
VDGR
250
Vdc
Gate−Source Voltage — Continuous
VGS
±20
Vdc
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp ≤ 10 μs)
ID
ID
IDM
32
25
96
Adc
Apk
Total Power Dissipation @ 25°C
Derate above 25°C
Total Power Dissipation @ TA = 25°C (1)
PD
250
2.0
3.57
Watts
W/°C
Watts
Operating and Storage Temperature Range
TJ, Tstg
−55 to 150
°C
Single Pulse Drain−to−Source Avalanche Energy — Starting TJ = 25°C
(VDD = 50 Vdc, VGS = 10 Vdc, Peak IL = 32 Apk, L = 8.8 mH, RG = 25 Ω )
EAS
600
mJ
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Thermal Resistance — Junction to Ambient (1)
RθJC
RθJA
RθJA
0.5
62.5
35
°C/W
Maximum Temperature for Soldering Purposes, 1/8″ from case for 10 seconds
TL
260
°C
(1) When surface mounted to an FR4 board using the minimum recommended pad size.
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.


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