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LM27222 Arkusz danych(PDF) 7 Page - Texas Instruments |
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LM27222 Arkusz danych(HTML) 7 Page - Texas Instruments |
7 / 16 page P = QG-H fSW x VCC 2 RH-pu RH-pu + RG-H + RH-pd RH-pd + RG-H + QG-L RL-pu RL-pu + RG-L RL-pd RL-pd + RG-L + ^ ^ LM27222 www.ti.com SNVS306B – SEPTEMBER 2004 – REVISED MARCH 2013 In the case of insufficient initial CB-SW voltage (less than 2V) such as when the output rail is pre-biased, the shoot-through protection circuit holds LG low for about 170ns, beginning from the instant when IN goes high. After the 170ns delay, the status of LG is dictated by LEN and IN. Once LG goes high and SW goes low, the bootstrap capacitor will be charged up (assuming SW is grounded for long enough time). As a result, CB-SW will be close to 5V and the LM27222 will now fully support synchronous operation. The dead-time between the high- and low-side pulses is kept as small as possible to minimize conduction through the body diode of the low-side MOSFET(s). POWER DISSIPATION The power dissipated in the driver IC when switching synchronously can be calculated as follows: where • where fSW = switching frequency • VCC = voltage at the VCC pin • QG_H = total gate charge of the (parallel combination of the) high-side MOSFET(s) • QG_L = total gate charge of the (parallel combination of the) low-side MOSFET(s) • RG_H = gate resistance of the (parallel combination of the) high-side MOSFET(s) • RG_L = gate resistance of the (parallel combination of the) low-side MOSFET(S) • RH_pu = pull-up RDS_ON of the high-side driver • RH_pd = pull-down RDS_ON of the high-side driver • RL_pu = pull-up RDS_ON of the low-side driver • RL_pd = pull-down RDS_ON of the low-side driver (1) PC BOARD LAYOUT GUIDELINES 1. Place the driver as close to the MOSFETs as possible. 2. HG, SW, LG, GND: Run short, thick traces between the driver and the MOSFETs. To minimize parasitics, the traces for HG and SW should run parallel and close to each other. The same is true for LG and GND. 3. Driver VCC: Place the decoupling capacitor close to the VCC and GND pins. 4. The high-current loop between the high-side and low-side MOSFETs and the input capacitors should be as small as possible. 5. There should be enough copper area near the MOSFETs and the inductor for heat dissipation. Vias may also be added to carry the heat to other layers. Copyright © 2004–2013, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: LM27222 |
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