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TMP275-Q1 Arkusz danych(PDF) 10 Page - Texas Instruments |
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TMP275-Q1 Arkusz danych(HTML) 10 Page - Texas Instruments |
10 / 31 page 10 TMP275-Q1 SBOS760A – NOVEMBER 2015 – REVISED JANUARY 2016 www.ti.com Product Folder Links: TMP275-Q1 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated 7.3.4 Serial Bus Address To communicate with the TMP275-Q1, the master must first address slave devices through a slave address byte. The slave address byte consists of seven address bits and a direction bit indicating the intent of executing a read or write operation. The TMP275-Q1 features three address pins, allowing up to eight devices to be connected per bus. Pin logic levels are described in Table 2. The address pins of the TMP275-Q1 are read after reset, at the start of communication, or in response to a two-wire address acquire request. Following reading the state of the pins, the address is latched to minimize power dissipation associated with detection. Table 2. Address Pins and Slave Addresses for the TMP275-Q1 A2 A1 A0 SLAVE ADDRESS 0 0 0 1001000 0 0 1 1001001 0 1 0 1001010 0 1 1 1001011 1 0 0 1001100 1 0 1 1001101 1 1 0 1001110 1 1 1 1001111 7.3.4.1 Writing and Reading to the TMP275-Q1 Accessing a particular register on the TMP275-Q1 is accomplished by writing the appropriate value to the Pointer register. The value for the Pointer register is the first byte transferred after the slave address byte with the R/W bit low. Every write operation to the TMP275-Q1 requires a value for the Pointer register; see Figure 8. When reading from the TMP275-Q1, the last value stored in the Pointer register by a write operation is used to determine which register is read by a read operation. To change the register pointer for a read operation, a new value must be written to the Pointer register. This action is accomplished by issuing a slave address byte with the R/W bit low, followed by the Pointer register byte. No additional data are required. The master can then generate a START condition and send the slave address byte with the R/W bit high to initiate the read command; see Figure 9 for details of this sequence. If repeated reads from the same register are desired, the Pointer register bytes do not have to be continually sent because the TMP275-Q1 remembers the Pointer register value until it is changed by the next write operation. Note that register bytes are sent most-significant byte first, followed by the least significant byte. 7.3.4.2 Slave Mode Operations The TMP275-Q1 can operate as a slave receiver or slave transmitter. 7.3.4.2.1 Slave Receiver Mode The first byte transmitted by the master is the slave address, with the R/W bit low. The TMP275-Q1 then acknowledges reception of a valid address. The next byte transmitted by the master is the Pointer register. The TMP275-Q1 then acknowledges reception of the Pointer register byte. The next byte or bytes are written to the register addressed by the Pointer register. The TMP275-Q1 acknowledges reception of each data byte. The master can terminate data transfer by generating a START or STOP condition. 7.3.4.2.2 Slave Transmitter Mode The first byte is transmitted by the master and is the slave address, with the R/W bit high. The slave acknowledges reception of a valid slave address. The next byte is transmitted by the slave and is the most significant byte of the register indicated by the Pointer register. The master acknowledges reception of the data byte. The next byte transmitted by the slave is the least significant byte. The master acknowledges reception of the data byte. The master can terminate data transfer by generating a Not-Acknowledge bit on reception of any data byte, or by generating a START or STOP condition. |
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