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SI53308 Arkusz danych(PDF) 9 Page - Silicon Laboratories

Numer części SI53308
Szczegółowy opis  DUAL 1:3 LOW-JITTER BUFFER/LEVEL TRANSLATOR
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Producent  SILABS [Silicon Laboratories]
Strona internetowa  http://www.silabs.com
Logo SILABS - Silicon Laboratories

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Si53308
Rev. 0.9
9
Power Supply Noise
Rejection7
PSRR
10 kHz sinusoidal noise
–65
dBc
100 kHz sinusoidal noise
–62
dBc
500 kHz sinusoidal noise
–60
dBc
1 MHz sinusoidal noise
–55
dBc
Table 10. AC Characteristics (Continued)
(VDD = VDDOX =1.8 V 5%, 2.5 V  5%, or 3.3 V 10%,TA = –40 to 85 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Notes:
1.
Measured from the initial transition of the corresponding input clock to the falling edge of LOS
2.
Measured from the final transition of the corresponding input clock to the rising edge of LOS.
3.
When using the on-chip clock divider, a minimum input clock slew rate of 30 mV/ns is required.
4.
Measurements were made with receiver termination. See Figure 7 on page 18.
5.
Output to Output skew specified for outputs with an identical configuration.
6.
Defined as skew between any output on different devices operating at the same supply voltages, temperatures, and
equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross
points.
7.
Measured for 156.25 MHz carrier frequency. Sine-wave noise added to VDDOX (3.3 V = 100 mVPP) and noise spur
amplitude measured. See “AN491: Power Supply Rejection for Low-Jitter Clocks” for further details.


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