CDCLVP2106

SCAS887B – SEPTEMBER 2009 – REVISED JANUARY 2016

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

–0.5

4.6

V

–0.5

V

–0.5

V

Input current

20

mA

Output current

50

mA

Specified free-air temperature (no airflow)

–40

85

°C

Maximum junction temperature

125

°C

Storage temperature

–65

150

°C

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

All supply voltages must be supplied simultaneously.

(3)

The input and output negative voltage ratings may be exceeded if the input clamp-current and output clamp-current ratings are

observed.

6.2 ESD Ratings

VALUE

UNIT

2000

Electrostatic discharge

V

Charged-device model (CDM), per JEDEC specification JESD22-

1000

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted).

MIN

NOM

MAX

UNIT

Supply voltage

2.375

2.5/3.3

3.60

V

Ambient temperature

–40

85

°C

PCB temperature (measured at thermal pad)

105

°C

6.4 Thermal Information

CDCLVP2106

(RHA) VQFN

UNIT

40 PINS

0 LFM

34.7

°C/W

Junction-to-case (top) thermal resistance

23.7

°C/W

Junction-to-board thermal resistance

10.1

°C/W

Junction-to-top characterization parameter

0.5

°C/W

Junction-to-board characterization parameter

10.0

°C/W

Junction-to-case (bottom) thermal resistance

3.8

°C/W

3.58

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report (SPRA953).

(2)

The package thermal resistance is calculated in accordance with JESD 51 and JEDEC 2S2P (high-K board).

(3)

Connected to GND with 16 thermal vias (0.3-mm diameter).

(4)

4 × 4 vias on pad

(5)

package.

6

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