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ADS41B49IRGZR Arkusz danych(PDF) 9 Page - Texas Instruments

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Numer części ADS41B49IRGZR
Szczegółowy opis  Ultralow-Power ADCs
Download  59 Pages
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Producent  TI1 [Texas Instruments]
Strona internetowa  http://www.ti.com
Logo TI1 - Texas Instruments

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ADS41B29, ADS41B49
www.ti.com
SBAS486F – NOVEMBER 2009 – REVISED FEBRUARY 2016
Product Folder Links: ADS41B29 ADS41B49
Submit Documentation Feedback
Copyright © 2009–2016, Texas Instruments Incorporated
(1)
Minimum values for ADS41B49 are specified across the ambient temperature range of –40°C to +105°C.
(2)
The maximum DRVDD current with CMOS interface depends on the actual load capacitance on the digital output lines. Note that the
maximum recommended load capacitance on each digital output line is 10 pF.
(3)
In CMOS mode, the DRVDD current scales with the sampling frequency, the load capacitance on output pins, input frequency, and the
supply voltage (see the CMOS Interface Power Dissipation section in the Feature Description).
6.5 Electrical Characteristics: General
Typical values are at TA = 25°C, AVDD = 1.8 V, AVDD_BUF = 3.3 V, DRVDD = 1.8 V, and 50% clock duty cycle, unless
otherwise noted. Minimum and maximum values are across the full ambient temperature range: TA, MIN = –40°C to TA, MAX =
85°C, AVDD = 1.8 V, AVDD_BUF = 3.3 V, and DRVDD = 1.8 V, unless otherwise noted.
(1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ANALOG INPUTS
Differential input voltage range
1.5
VPP
Differential input resistance
At dc (see Figure 83)
10
k
Ω
Differential input capacitance
(see Figure 84)
3.5
pF
Analog input bandwidth
800
MHz
Analog input common-mode current
(per input pin)
2
µA
VCM
Common-mode output voltage
1.7
V
VCM output current capability
4
mA
DC ACCURACY
Offset error
–15
2.5
15
mV
Temperature coefficient of offset error
0.003
mV/°C
EGREF
Gain error as a result of
internal reference inaccuracy alone
–2
2
%FS
EGCHAN
Gain error of channel alone
2.5
%FS
POWER SUPPLY
IAVDD
Analog supply current
99.5
115
mA
IAVDD_BUF
Analog input buffer supply current
29
42
mA
IDRVDD
Output buffer supply current(2)
LVDS interface with 100-
Ω external
termination, low LVDS swing (200 mV)
63
mA
LVDS interface with 100-
Ω external
termination, standard LVDS swing
(350 mV)
75
90
IDRVDD output buffer supply current(2)(3)
CMOS interface(3), 8-pF external load
capacitance, fIN = 2.5 MHz
35
mA
Global power-down
10
25
mW
Standby
200
mW


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