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ADS131E08S Arkusz danych(PDF) 5 Page - Texas Instruments |
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ADS131E08S Arkusz danych(HTML) 5 Page - Texas Instruments |
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5 / 67 page  5 ADS131E08S www.ti.com SBAS705A – JUNE 2015 – REVISED JANUARY 2016 Product Folder Links: ADS131E08S Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Pin Functions (continued) PIN FUNCTION DESCRIPTION NAME NO. START 38 Digital input Start conversion TESTN(1) 18 Analog input/output Test signal, negative pin; connect to DGND with a 10-k Ω resistor if unused TESTP(1) 17 Analog input/output Test signal, positive pin; connect to DGND with a 10-k Ω resistor if unused VCAP1 28 Analog output Analog bypass capacitor; connect a 470-pF capacitor to AVSS VCAP2 30 Analog output Analog bypass capacitor; connect a 270-nF capacitor to AVSS VCAP3 55 Analog output Analog bypass capacitor; connect a 270-nF capacitor to AVSS VCAP4 26 Analog output Analog bypass capacitor; connect a 270-nF capacitor to AVSS VREFN 25 Analog input Negative reference voltage; connect to AVSS VREFP 24 Analog output Positive reference voltage output; connect a 330-nF capacitor to VREFN (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Input pins are diode-clamped to the power-supply rails. Input signals that can swing beyond the supply rails must be current limited to 10 mA or less. 7 Specifications 7.1 Absolute Maximum Ratings over operating ambient temperature range (unless otherwise noted) (1) MIN MAX UNIT AVDD to AVSS –0.3 5.5 V DVDD to DGND –0.3 3.9 V AVSS to DGND –3.0 0.2 V Analog input voltage AVSS – 0.3 AVDD + 0.3 V Digital input voltage DGND – 0.3 DVDD + 0.3 V Digital output voltage DGND – 0.3 DVDD + 0.3 V Continuous input current to any pin except supply pins(2) –10 10 mA Junction temperature, TJ –40 150 °C Storage temperature, Tstg –60 150 °C (1) JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process. 7.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500 |
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