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ADS8555SPMR Arkusz danych(PDF) 2 Page - Texas Instruments

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Numer części ADS8555SPMR
Szczegółowy opis  16-Bit, Six-Channel, Simultaneous Sampling Analog-to-Digital Converter
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Producent  TI1 [Texas Instruments]
Strona internetowa  http://www.ti.com
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ADS8555SPMR Arkusz danych(HTML) 2 Page - Texas Instruments

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ADS8555
SBAS531D – DECEMBER 2010 – REVISED FEBRUARY 2016
www.ti.com
Product Folder Links: ADS8555
Submit Documentation Feedback
Copyright © 2010–2016, Texas Instruments Incorporated
Table of Contents
1
Features .................................................................. 1
2
Applications ........................................................... 1
3
Description ............................................................. 1
4
Revision History..................................................... 2
5
Pin Configuration and Functions ......................... 3
6
Specifications......................................................... 6
6.1
Absolute Maximum Ratings ...................................... 6
6.2
ESD Ratings.............................................................. 7
6.3
Recommended Operating Conditions ....................... 7
6.4
Thermal Information .................................................. 7
6.5
Electrical Characteristics........................................... 8
6.6
Serial Interface Timing Requirements..................... 11
6.7
Parallel Interface Timing Requirements (Read
Access) .................................................................... 11
6.8
Parallel Interface Timing Requirements (Write
Access) .................................................................... 11
6.9
Typical Characteristics ............................................ 14
7
Detailed Description ............................................ 19
7.1
Overview ................................................................. 19
7.2
Functional Block Diagram ....................................... 19
7.3
Feature Description................................................. 20
7.4
Device Functional Modes........................................ 25
7.5
Register Maps ......................................................... 29
8
Applications and Implementation ...................... 31
8.1
Application Information............................................ 31
8.2
Typical Application .................................................. 31
9
Power Supply Recommendations ...................... 35
10
Layout................................................................... 35
10.1
Layout Guidelines ................................................. 35
10.2
Layout Example .................................................... 36
11
Device and Documentation Support ................. 37
11.1
Documentation Support ....................................... 37
11.2
Community Resources.......................................... 37
11.3
Trademarks ........................................................... 37
11.4
Electrostatic Discharge Caution ............................ 37
11.5
Glossary ................................................................ 37
12
Mechanical, Packaging, and Orderable
Information ........................................................... 37
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (October 2015) to Revision D
Page
Changed Figure 36: changed capacitor values from 820 nF to 820 pF .............................................................................. 32
Changes from Revision B (February 2011) to Revision C
Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
Changes from Revision A (January 2011) to Revision B
Page
Changed description of pin 18 in Pin Descriptions table........................................................................................................ 5
Added clarification of INT in BUSY/INT section ................................................................................................................... 23
Updated Table 4 ................................................................................................................................................................... 28
Changed bit C20 in Table 5.................................................................................................................................................. 30
Changes from Original (December 2010) to Revision A
Page
Changed description of CONVST_C, CONVST_B, and CONVST_A pins in Pin Descriptions table .................................... 5
Changed description of CONVST_x section ........................................................................................................................ 22
Changed first paragraph of BUSY/INT section..................................................................................................................... 23


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