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STB18N60DM2 Arkusz danych(PDF) 4 Page - STMicroelectronics |
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STB18N60DM2 Arkusz danych(HTML) 4 Page - STMicroelectronics |
4 / 15 page Electrical characteristics STB18N60DM2 4/15 DocID027677 Rev 3 2 Electrical characteristics (Tcase= 25 °C unless otherwise specified) Table 5: Static Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown voltage VGS = 0 V, ID = 1 mA 600 V IDSS Zero gate voltage drain current VGS = 0 V, VDS = 600 V 1.5 µA VGS = 0 V, VDS = 600 V, Tcase = 125 °C 100 µA IGSS Gate-body leakage current VDS = 0 V, VGS = ±25 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 3 4 5 V RDS(on) Static drain-source on- resistance VGS = 10 V, ID = 6 A 0.260 0.295 Ω Table 6: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance VDS = 100 V, f = 1 MHz, VGS = 0 V - 800 - pF Coss Output capacitance - 40 - Crss Reverse transfer capacitance - 1.33 - Coss eq.(1) Equivalent output capacitance VDS = 0 to 480 V, f = 1 MHz, VGS = 0 V - 80 - pF RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 5.6 - Ω Qg Total gate charge VDD = 480 V, ID = 12 A, VGS = 10 V (see Figure 15: "Test circuit for gate charge behavior") - 20 - nC Qgs Gate-source charge - 5.2 - Qgd Gate-drain charge - 8.5 - Notes: (1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS Table 7: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD = 300 V, ID = 6 A RG = 4.7 Ω, VGS = 10 V (see Figure 14: "Test circuit for resistive load switching times" and Figure 19: "Switching time waveform") - 13.5 - ns tr Rise time - 8 - td(off) Turn-off-delay time - 9.5 - tf Fall time - 32.5 - |
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