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SN74AHC273DGVR Arkusz danych(PDF) 11 Page - Texas Instruments

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Numer części SN74AHC273DGVR
Szczegółowy opis  Octal D-Type Flip-Flops With Clear
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µC or
System Logic
CLR
V
GND
1Q
8Q
1D
8D
Regulated 3.3 V
5 V
System Logic
CC
CLK
SN54AHC273, SN74AHC273
www.ti.com
SCLS376I – JUNE 1997 – REVISED MARCH 2015
10 Application and Implementation
10.1 Application Information
The SNx4AHC273 is a low-drive CMOS device that can be used for a multitude of applications where output
ringing is a concern. The low drive and slow edge rates will minimize overshoot and undershoot on the outputs.
The inputs are tolerant to 5.5 V at any valid VCC. This feature makes the device ideal for translating down to the
VCC level. Figure 5 shows the reduction in ringing compared to higher drive parts such as AC.
10.2 Typical Application
Figure 4. Specific Application Schematic
10.2.1 Design Requirements
This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus
contention because it can drive currents that would exceed maximum limits. The high drive will also create fast
edges into light loads, so routing and load conditions should be considered to prevent ringing.
10.2.2 Detailed Design Procedure
1. Recommended input conditions
Rise time and fall time specs: See (
Δt/ΔV) in the Recommended Operating Conditions table.
Specified High and low levels: See (VIH and VIL) in the Recommended Operating Conditions table.
Inputs are overvoltage tolerant allowing them to go as high as 5.5 V at any valid VCC
2. Recommend output conditions
Load currents should not exceed 25 mA per output and 75 mA total for the part
Outputs should not be pulled above VCC
Copyright © 1997–2015, Texas Instruments Incorporated
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