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TS81001-QFNR Arkusz danych(PDF) 7 Page - Semtech Corporation

Numer części TS81001-QFNR
Szczegółowy opis  High Efficiency Receiver Controller for Wireless Power Systems
Download  16 Pages
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Producent  SEMTECH [Semtech Corporation]
Strona internetowa  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

TS81001-QFNR Arkusz danych(HTML) 7 Page - Semtech Corporation

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TS81001
Final Datasheet
Rev 1.2
June 2, 2015
www.semtech.com
7 of 16
Semtech
Read Register Operations
Description
START
Start of the I2C transfer
M[S
Slave Address (7 bits)
0 (1 bit) Slave ACK
Slave address + 0 as R/nW bit (0x92 as 8-bit).
M[S
Register n address (8 bits)
Slave ACK
Address of the first register.
START
Repeated Start.
M[S
Slave Address (7 bits)
1 (1 bit) Slave ACK
Slave address + 1 as R/nW bit (0x93 as 8-bit).
S[M
Register n Data (8 bits)
Master ACK
Read the first register.
S[M
Register n+1 Data (8 bits)
Master ACK
Optionally read the following registers.
...
S[M
Register n+k Data (8 bits)
Slave ACK
The master should send a nACK after the last data byte was
received.
STOP
Stop of the I2C transfer.
Run API Function Operations
Description
START
Start of the I2C transfer
M[S
Slave Address (7 bits)
0 (1 bit) Slave ACK
Slave address + R/nW bit (0x92 as 8-bit).
M[S
API number (8 bits)
Slave ACK
API number.
M[S
API input buffer length m (8 bits)
Slave ACK
API input buffer length. Equal to 0 if no input buffer data is
required by the API.
M[S
Input buffer data[0] (8 bits)
Slave ACK
First byte of the input buffer (optional).
M[S
Input buffer data[1] (8 bits)
Slave ACK
Second byte of the input buffer (optional).
...
M[S
Input buffer data[m-1] (8 bits)
Slave ACK
Last byte of the input buffer (optional).
STOP
Stop of the I2C transfer and execute the API function
Read API Function Return Buffer
Description
START
Start of the I2C transfer
M[S
Slave Address (7 bits)
0 (1 bit) Slave ACK
Slave address + R/nW bit (0x92 as 8-bit).
M[S
Register n address (8 bits)
Slave ACK
API number.
START
Repeated Start.
M[S
Slave Address (7 bits)
1 (1 bit) Slave ACK
Slave address + 1 as R/nW bit (0x93 as 8-bit).
S[M
API number (8 bits)
Master ACK
API number for the following return buffer.
S[M
API return buffer length n (8 bits)
Master ACK
API return buffer length.
S[M
Output buffer data[0] (8 bits)
Master ACK
Read the first byte in the output buffer.
S[M
Output buffer data[1] (8 bits)
Master ACK
Optionally read the following bytes.
...
S[M
Output buffer data[n-1] (8 bits)
Master nACK
The master should send a nACK after the last data byte was
received.
STOP
Stop of the I2C transfer.


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