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ADXL363BCCZ-RL7 Arkusz danych(PDF) 8 Page - Analog Devices |
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ADXL363BCCZ-RL7 Arkusz danych(HTML) 8 Page - Analog Devices |
8 / 48 page ADXL363 Data Sheet Rev. 0 | Page 8 of 48 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 3. Pin Configuration (Top View) Table 8. Pin Function Descriptions Pin No. Mnemonic Description 1 VDD I/O Supply Voltage for Digital I/O. 2 NC No Connect. This pin is not internally connected. 3 RESERVED Reserved. Leave this pin unconnected, or connect it to GND. 4 SCLK SPI Communications Clock. 5 ADC_IN Input to Auxiliary ADC. 6 MOSI Master Output, Slave Input. SPI serial data input. 7 MISO Master Input, Slave Output. SPI serial data output. 8 CS SPI Chip Select, Active Low. Must be low during SPI communications. 9 INT2 Interrupt 2 Output. INT2 also serves as an input for synchronized sampling. 10 RESERVED Reserved. Leave this pin unconnected, or connect it to GND. 11 INT1 Interrupt 1 Output. INT1 also serves as an input for external clocking. 12 GND Ground. Ground this pin. 13 GND Ground. Ground this pin. 14 VS Supply Voltage. 15 NC No Connect. This pin is not internally connected. 16 GND Ground. Ground this pin. NOTES 1. NC = NO CONNECT. THIS PIN IS NOT INTERNALLY CONNECTED. NC VDD I/O RESERVED SCLK ADC_IN GND GND INT1 RESERVED INT2 ADXL363 TOP VIEW (Not to Scale) 1 2 3 4 5 13 12 11 10 9 6 7 8 16 15 14 |
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Podobny opis - ADXL363BCCZ-RL7 |
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