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DM54LS138 Arkusz danych(PDF) 1 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Numer części DM54LS138
Szczegółowy opis  Decoders/Demultiplexers
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Strona internetowa  http://www.national.com
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DM54LS138 Arkusz danych(HTML) 1 Page - National Semiconductor (TI)

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TLF6391
June 1989
54LS138DM54LS138DM74LS138
54LS139DM54LS139DM74LS139
DecodersDemultiplexers
General Description
These Schottky-clamped circuits are designed to be used in
high-performance memory-decoding or data-routing appli-
cations requiring very short propagation delay times In
high-performance memory systems these decoders can be
used to minimize the effects of system decoding When
used with high-speed memories the delay times of these
decoders are usually less than the typical access time of the
memory This means that the effective system delay intro-
duced by the decoder is negligible
The LS138 decodes one-of-eight lines based upon the con-
ditions at the three binary select inputs and the three enable
inputs Two active-low and one active-high enable inputs
reduce the need for external gates or inverters when ex-
panding A 24-line decoder can be implemented with no ex-
ternal inverters and a 32-line decoder requires only one
inverter An enable input can be used as a data input for
demultiplexing applications
The LS139 comprises two separate two-line-to-four-line de-
coders in a single package The active-low enable input can
be used as a data line in demultiplexing applications
All of these decodersdemultiplexers feature fully buffered
inputs presenting only one normalized load to its driving
circuit
All inputs are clamped with high-performance
Schottky diodes to suppress line-ringing and simplify system
design
Features
Y
Designed specifically for high speed
Memory decoders
Data transmission systems
Y
LS138 3-to-8-line decoders incorporates 3 enable in-
puts to simplify cascading andor data reception
Y
LS139 contains two fully independent 2-to-4-line decod-
ersdemultiplexers
Y
Schottky clamped for high performance
Y
Typical propagation delay (3 levels of logic)
LS138
21 ns
LS139
21 ns
Y
Typical power dissipation
LS138
32 mW
LS139
34 mW
Y
Alternate
MilitaryAerospace
devices
(54LS138
54LS139) are available Contact a National Semicon-
ductor Sales OfficeDistributor for specifications
Connection Diagrams
Dual-in-Line Package
TLF6391 – 1
Order Number 54LS138DMQB 54LS138FMQB
54LS138LMQB DM54LS138J DM54LS138W
DM74LS138M or DM74LS138N
See NS Package Number E20A J16A
M16A N16E or W16A
Dual-in-Line Package
TLF6391 – 2
Order Number 54LS139DMQB 54LS139FMQB
54LS139LMQB DM54LS139J DM54LS139W
DM74LS139M or DM74LS139N
See NS Package Number E20A J16A
M16A N16E or W16A
C1995 National Semiconductor Corporation
RRD-B30M105Printed in U S A


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