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74CB3Q3125DBQRE4 Arkusz danych(PDF) 8 Page - Texas Instruments

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Numer części 74CB3Q3125DBQRE4
Szczegółowy opis  Quadruple FET Bus Switch
Download  26 Pages
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Producent  TI1 [Texas Instruments]
Strona internetowa  http://www.ti.com
Logo TI1 - Texas Instruments

74CB3Q3125DBQRE4 Arkusz danych(HTML) 8 Page - Texas Instruments

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1A
1OE
SW
1B
3A
3OE
SW
3B
2A
2OE
SW
2B
4A
4OE
SW
4B
2
1
9
10
3
8
5
4
12
13
6
11
A
EN(1)
B
Charge
Pump
VCC
SN74CB3Q3125
SCDS143C – OCTOBER 2003 – REVISED JUNE 2015
www.ti.com
8 Detailed Description
8.1 Overview
The SN74CB3Q3125 device is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate
voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state
resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O)
ports. The SN74CB3Q3125 device also features low data I/O capacitance to minimize capacitive loading and
signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the
SN74CB3Q3125 device provides an optimized interface solution ideally suited for broadband communications,
networking, and data-intensive computing systems.
The SN74CB3Q3125 device is organized as four 1-bit bus switches with separate output-enable (1OE, 2OE,
3OE, 4OE) inputs. It can be used as four 1-bit bus switches or as one 4-bit bus switch. When OE is low, the
associated 1-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow
between ports. When OE is high, the associated 1-bit bus switch is OFF, and a high-impedance state exists
between the A and B ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging
current backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Figure 4. Simplified Schematic, Each FET Switch (SW)
8.2 Functional Block Diagram
8
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Copyright © 2003–2015, Texas Instruments Incorporated
Product Folder Links: SN74CB3Q3125


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