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ADC12D040CIVSX Arkusz danych(PDF) 1 Page - National Semiconductor (TI) |
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ADC12D040CIVSX Arkusz danych(HTML) 1 Page - National Semiconductor (TI) |
1 / 22 page ADC12D040 Dual 12-Bit, 40 MSPS, 600 mW A/D Converter with Internal/External Reference and Sample-and-Hold General Description The ADC12D040 is a dual, low power monolithic CMOS analog-to-digital converter capable of converting analog in- put signals into 12-bit digital words at 40 Megasamples per second (MSPS), minimum. This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic per- formance. Operating on a single 5V power supply, the ADC12D040 achieves 10.9 effective bits at 10 MHz input and consumes just 600 mW at 40 MSPS, including the reference current. The Power Down feature reduces power consumption to 75 mW. The differential inputs provide a full scale input swing equal to V REF with the possibility of a single-ended input. Full use of the differential input is recommended for optimum perfor- mance. For ease of use, the buffered, high impedance, single-ended reference input is converted on-chip to a differ- ential reference for use by the processing circuitry. The digital outputs for the two ADCs are available on separate 12-bit buses with an output data format choice of offset binary or 2’s complement. For ease of interface, the digital output driver power pins of the ADC12D040 can be connected to a separate supply voltage in the range of 2.5V to the digital supply voltage, making the outputs compatible with low voltage systems. When not converting, power consumption can be reduced by pulling the PD pin high, placing the converter into the power- down state where it typically consumes just 75 mW. The ADC12D040’s speed, resolution and single supply operation make it well suited for a variety of applications. This device is available in the 64-lead TQFP package and will operate over the industrial temperature range of −40˚C to +85˚C. Features n Binary/2’s comp output format n Single supply operation n Internal sample-and-hold n Outputs 2.5V to 5V compatible n TTL/CMOS compatible input/outputs n Low power consumption n Power down mode n On-chip reference buffer n Internal/External 2V reference Key Specifications n Resolution 12 Bits n Conversion Rate 40 MSPS(min) n DNL ±0.4 LSB(typ) n INL ±0.7 LSB(typ) n SNR (f IN = 10MHz) 68 dB(typ) n ENOB (f IN = 10MHz) 10.9 bits(typ) n THD (f IN = 10 MHz) −78 dB (typ) n SFDR (f IN = 10 MHz) 80 dB (typ) n Data Latency 6 Clock Cycles n Supply Voltage +5V ±5% n Power Consumption, Operating 600 mW(typ) n Power Down 75 mW(typ) n Crosstalk 80 dB(typ) Applications n Ultrasound and Imaging n Instrumentation n Communications Receivers n Sonar/Radar n xDSL n Cable Modems n DSP Front Ends December 2002 © 2002 National Semiconductor Corporation DS200460 www.national.com |
Podobny numer części - ADC12D040CIVSX |
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Podobny opis - ADC12D040CIVSX |
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