LM4040AI-4.1 datasheet(8/41 Pages) NSC

Numer części	LM4040AI-4.1

Szczegółowy opis	Self-Calibrating 12-Bit Plus Sign Serial I/O A/D Converters with MUX and Sample/Hold

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Producent	NSC [National Semiconductor (TI)]

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DC and Logic Electrical Characteristics (Continued)

The following specifications apply for V

+ =V

A+=VD+ = +5.0 VDC,VREF+ = +4.096 VDC,VREF−=0 VDC, 12-bit + sign conver-

sion mode, f

CK =fSK = 8 MHz for the ADC12H030, ADC12H032, ADC12H034 and ADC12H038, fCK =fSK = 5 MHz for the

ADC12030, ADC12032, ADC12034 and ADC12038, R

S =25

Ω, source impedance for V

REF+ and VREF−

≤ 25Ω,

fully-differential input with fixed 2.048V common-mode voltage, and 10(t

CK) acquisition time unless otherwise specified. Bold-

face limits apply for T

A =TJ =TMIN to TMAX; all other limits TA =TJ = 25˚C. (Notes 7, 8, 9)

Symbol

Parameter

Conditions

Typical

Limits

Units

(Note 10)

(Note 11)

(Limits)

POWER SUPPLY CHARACTERISTICS

and ADC12038

CS = HIGH, Powered Down, CCLK off

20

µA

Digital Supply Current

Awake

2.3

3.2

mA

ADC12H030, ADC12H032,

CS = HIGH, Powered Down, CCLK on

0.9

mA

ADC12H034 and ADC12H038

CS = HIGH, Powered Down, CCLK off

20

µA

I

A+

Positive Analog Supply Current

Awake

2.7

4.0

mA (max)

CS = HIGH, Powered Down, CCLK on

10

µA

CS = HIGH, Powered Down, CCLK off

0.1

µA

I

REF

Reference Input Current

Awake

70

µA

CS = HIGH, Powered Down

0.1

µA

AC Electrical Characteristics

The following specifications apply for V

+ =V

A+=VD+ = +5.0 VDC,VREF+ = +4.096 VDC,VREF−=0 VDC, 12-bit + sign conver-

sion mode, t

r =tf = 3 ns, fCK =fSK = 8 MHz for the ADC12H030, ADC12H032, ADC12H034 and ADC12H038, fCK =fSK =5

MHz for the ADC12030, ADC12032, ADC12034 and ADC12038, R

S =25

Ω, source impedance for V

REF+ and VREF−

≤ 25Ω,

fully-differential input with fixed 2.048V common-mode voltage, and 10(t

CK) acquisition time unless otherwise specified. Bold-

face limits apply for T

A =TJ =TMIN to TMAX; all other limits TA =TJ = 25˚C. (Note 17)

Symbol

Parameter

Conditions

Typical

(Note 10)

ADC12H030/2/4/8 ADC12030/2/4/8

Units

(Limits)

Limits

(Note 11)

f

CK

Conversion Clock

10

85

MHz (max)

(CCLK) Frequency

1

MHz (min)

f

SK

Serial Data Clock

10

85

MHz (max)

SCLK Frequency

0

Hz (min)

Conversion Clock

40

% (min)

Duty Cycle

60

% (max)

Serial Data Clock

40

% (min)

Duty Cycle

60

% (max)

t

C

Conversion Time

12-Bit + Sign or 12-Bit

44(t

CK)

44(t

CK)

44(t

CK)

(max)

5.5

8.8

µs (max)

8-Bit + Sign or 8-Bit

21(t

CK)

21(t

CK)

21(t

CK)

(max)

2.625

4.2

µs (max)

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