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CD4723BMJ Arkusz danych(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Numer części CD4723BMJ
Szczegółowy opis  Dual 4-Bit, 8-Bit Addressable Latch
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Producent  NSC [National Semiconductor (TI)]
Strona internetowa  http://www.national.com
Logo NSC - National Semiconductor (TI)

CD4723BMJ Arkusz danych(HTML) 4 Page - National Semiconductor (TI)

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AC Electrical Characteristics
TA e 25 C CL e 50 pF RL e 200k Input tr e tf e 20 ns unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
tPHL tPLH
Propagation Delay
VDD e 5V
200
400
ns
Data to Output
VDD e 10V
75
150
ns
VDD e 15V
50
100
ns
tPLH tPHL
Propagation Delay
VDD e 5V
200
400
ns
Enable to Output
VDD e 10V
80
160
ns
VDD e 15V
60
120
ns
tPHL
Propagation Delay
VDD e 5V
175
350
ns
Clear to Output
VDD e 10V
80
160
ns
VDD e 15V
65
130
ns
tPLH tPHL
Propagation Delay
VDD e 5V
225
450
ns
Address to Output
VDD e 10V
100
200
ns
VDD e 15V
75
150
ns
tTHL tTLH
Transition Time
VDD e 5V
100
200
ns
(Any Output)
VDD e 10V
50
100
ns
VDD e 15V
40
80
ns
TWH TWL
Minimum Data
VDD e 5V
100
200
ns
Pulse Width
VDD e 10V
50
100
ns
VDD e 15V
40
80
ns
tWH tWL
Minimum Address
VDD e 5V
200
400
ns
Pulse Width
VDD e 10V
100
200
ns
VDD e 15V
65
125
ns
tWH
Minimum Clear
VDD e 5V
75
150
ns
Pulse Width
VDD e 10V
40
75
ns
VDD e 15V
25
50
ns
tSU
Minimum Setup Time
VDD e 5V
40
80
ns
Data to E
VDD e 10V
20
40
ns
VDD e 15V
15
30
ns
tH
Minimum Hold Time
VDD e 5V
60
120
ns
Data to E
VDD e 10V
30
60
ns
VDD e 15V
25
50
ns
tSU
Minimum Setup Time
VDD e 5V
b
15
50
ns
Address to E
VDD e 10V
0
30
ns
VDD e 15V
0
20
ns
tH
Minimum Hold Time
VDD e 5V
b
50
15
ns
Address to E
VDD e 10V
b
20
10
ns
VDD e 15V
b
15
5
ns
CPD
Power Dissipation
Per Package
100
pF
Capacitance
(Note 4)
CIN
Input Capacitance
Any Input
50
75
pF
AC Parameters are guaranteed by DC correlated testing
Note 1
‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed they are not meant to imply that the devices
should be operated at these limits The tables of ‘‘Recommended Operating Conditions’’ and Electrical Characteristics’’ provide conditions for actual device
operation
Note 2
VSS e 0V unless otherwise specified
Note 3
IOL and IOH are tested one output at a time
Note 4
Dynamic power dissipation (PD) is given by PD e (CPD a CL)VCC2f a PQ where CL e load capacitance f e frequency of operation for further details
see Application Note AN-90 ‘‘54C74C Family Characteristics’’
4


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