Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

AD9684BBPZ-500 Arkusz danych(PDF) 8 Page - Analog Devices

Numer części AD9684BBPZ-500
Szczegółowy opis  Dual, 14-Bit, 1.25 GSPS, 1.2 V/2.5 V, Analog-to-Digital Converter
Download  64 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD9684BBPZ-500 Arkusz danych(HTML) 8 Page - Analog Devices

Back Button AD9684BBPZ-500 Datasheet HTML 4Page - Analog Devices AD9684BBPZ-500 Datasheet HTML 5Page - Analog Devices AD9684BBPZ-500 Datasheet HTML 6Page - Analog Devices AD9684BBPZ-500 Datasheet HTML 7Page - Analog Devices AD9684BBPZ-500 Datasheet HTML 8Page - Analog Devices AD9684BBPZ-500 Datasheet HTML 9Page - Analog Devices AD9684BBPZ-500 Datasheet HTML 10Page - Analog Devices AD9684BBPZ-500 Datasheet HTML 11Page - Analog Devices AD9684BBPZ-500 Datasheet HTML 12Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 64 page
background image
Product
Overview
Online
Documentation
Design
Resources
Discussion
Sample
& Buy
AD9684
Data Sheet
Rev. 0 | Page 8 of 64
Parameter
Temperature
Min
Typ
Max
Unit
APERTURE
Aperture Delay (tA)
Full
530
ps
Aperture Uncertainty (Jitter, tj)
Full
55
fs rms
Out of Range Recovery Time
Full
1
Clock Cycles
1
The maximum sample rate is the clock rate after the divider.
2
The minimum sample rate operates at 300 MSPS.
3
This specification is valid for parallel interleaved, channel multiplexed, and byte mode output modes.
4
This specification is valid for byte mode output mode only.
5
No DDCs used.
6
Wake-up time is defined as the time required to return to normal operation from power-down mode or standby mode.
TIMING SPECIFICATIONS
Table 5.
Parameter
Description
Min
Typ
Max
Unit
CLK± to SYNC± TIMING REQUIREMENTS
See Figure 2
tSU_SR
Device clock to SYNC± setup time
117
ps
tH_SR
Device clock to SYNC± hold time
−96
ps
SPI TIMING REQUIREMENTS
See Figure 3
tDS
Setup time between the data and the rising edge of SCLK
2
ns
tDH
Hold time between the data and the rising edge of SCLK
2
ns
tCLK
Period of the SCLK
40
ns
tS
Setup time between CSB and SCLK
2
ns
tH
Hold time between CSB and SCLK
2
ns
tHIGH
Minimum period that SCLK must be in a logic high state
10
ns
tLOW
Minimum period that SCLK must be in a logic low state
10
ns
tEN_SDIO
Time required for the SDIO pin to switch from an input to an
output relative to the SCLK falling edge (not shown in Figure 3)
10
ns
tDIS_SDIO
Time required for the SDIO pin to switch from an output to an
input relative to the SCLK rising edge (not shown in Figure 3)
10
ns
Timing Diagrams
CLK+
CLK–
SYNC+
SYNC–
tSU_SR
tH_SR
Figure 2. SYNC± Setup and Hold Timing
DON’T CARE
DON’T CARE
DON’T CARE
DON’T CARE
SDIO
SCLK
tS
tDH
tCLK
tDS
tH
R/W
A14
A13
A12
A11
A10
A9
A8
A7
D5
D4
D3
D2
D1
D0
tLOW
tHIGH
CSB
Figure 3. Serial Port Interface Timing Diagram


Podobny numer części - AD9684BBPZ-500

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Analog Devices
AD9684BBPZ-500 AD-AD9684BBPZ-500 Datasheet
1Mb / 65P
   Dual Analog-to-Digital Converter
More results

Podobny opis - AD9684BBPZ-500

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Analog Devices
AD9680 AD-AD9680 Datasheet
3Mb / 97P
   Dual, 14-Bit, 1.25 GSPS, 1.2 V/2.5 V, Analog-to-Digital Converter
AD9691 AD-AD9691 Datasheet
1Mb / 72P
   14-Bit, 1.25 GSPS JESD204B, Dual Analog-to-Digital Converter
AD9739 AD-AD9739 Datasheet
1Mb / 50P
   14-Bit, 2.5 GSPS, RF Digital-to-Analog Converter
AD9739BBCZ AD-AD9739BBCZ Datasheet
856Kb / 48P
   14-Bit, 2.5 GSPS, RF Digital-to-Analog Converter
REV. B
AD9739A AD-AD9739A Datasheet
1Mb / 44P
   14-Bit, 2.5 GSPS, RF Digital-to-Analog Converter
REV. 0
AD9625 AD-AD9625 Datasheet
1Mb / 56P
   12-Bit, 2.0 GSPS, 1.3 V/2.5 V Analog-to-Digital Converter
REV. 0
logo
Texas Instruments
DAC3482 TI1-DAC3482_15 Datasheet
2Mb / 106P
[Old version datasheet]   Dual-Channel, 16-Bit, 1.25 GSPS Digital-to-Analog Converter (DAC)
DAC3482IRKD25 TI1-DAC3482IRKD25 Datasheet
1Mb / 87P
[Old version datasheet]   Dual-Channel, 16-BIT, 1.25 GSPS Digital-to-Analog Converter (DAC)
ADC32RF44 TI1-ADC32RF44 Datasheet
7Mb / 134P
[Old version datasheet]   Dual-Channel, 14-Bit, 2.6-GSPS, Analog-to-Digital Converter
logo
Analog Devices
AD9208 AD-AD9208 Datasheet
1Mb / 137P
   14-Bit, 3 GSPS, JESD204B, Dual Analog-to-Digital Converter
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64


Arkusz danych Pobierz

Go To PDF Page


Link URL




Polityka prywatności
ALLDATASHEET.PL
Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com