ADuM3153ARSZ datasheet(5/22 Pages) AD

Numer części	ADuM3153ARSZ

Szczegółowy opis	3.75 kV, 7-Channel, SPIsolator Digital Isolators for SPI

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Producent	AD [Analog Devices]

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Data Sheet

ADuM3151/ADuM3152/ADuM3153

ELECTRICAL CHARACTERISTICS—3.3 V OPERATION

All typical specifications are at TA = 25°C and VDD1 = VDD2 = 3.3 V. Minimum and maximum specifications apply over the entire

recommended operation range: 3.0 V ≤ VDD1 ≤ 3.6 V, 3.0 V ≤ VDD2 ≤ 3.6 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching

specifications are tested with CL =15 pF and CMOS signal levels, unless otherwise noted.

Table 4. Switching Specifications

Parameter

Symbol

A Grade

B Grade

Unit

Test Conditions/Comments

Min

Typ

Max

Min

Typ

Max

MCLK, MO, SO

SPI Clock Rate

SPIMCLK

1

12.5

MHz

Data Rate Fast (MO, SO)

DRFAST

2

34

Mbps

Within PWD limit

Propagation Delay

tPHL, tPLH

30

20

ns

50% input to 50% output

Pulse Width

PW

100

12.5

ns

Within PWD limit

Pulse Width Distortion

PWD

3

ns

|tPLH − tPHL|

Codirectional Channel

Matching1

tPSKCD

4

2

ns

Jitter, High Speed

JHS

1

ns

MSS

Data Rate Fast

DRFAST

2

34

Mbps

Within PWD limit

Propagation Delay

tPHL, tPLH

30

ns

50% input to 50% output

Pulse Width

PW

100

12.5

ns

Within PWD limit

Pulse Width Distortion

PWD

3

ns

|tPLH − tPHL|

Setup Time2

MSSSETUP

1.5

10

ns

Jitter, Low Speed

JLS

2.5

ns

VIA, VIB, VIC

Data Rate Slow

DRSLOW

250

kbps

Within PWD limit

Propagation Delay

tPHL, tPLH

0.1

2.6

0.1

2.6

µs

50% input to 50% output

Pulse Width

PW

4

µs

Within PWD limit

Jitter, Low Speed

JLS

2.5

µs

|tPLH − tPHL|

VIx3 Minimum Input Skew4

tVIx SKEW3

10

ns

1

Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier.

2

The MSS signal is glitch filtered in both speed grades, whereas the other fast signals are not glitch filtered in the B grade. To guarantee that MSS reaches the output

ahead of another fast signal, set up MSS prior to the competing signal by different times depending on speed grade.

3

VIx = VIA, VIB, or VIC.

4

An internal asynchronous clock not available to users samples the low speed signals. If edge sequence in codirectional channels is critical to the end application, the

leading pulse must be at least 1 tVIx SKEW time ahead of a later pulse to guarantee the correct order or simultaneous arrival at the output.

Table 5. Supply Current

Device Number

Symbol

1 MHz, A Grade/B Grade

17 MHz, B Grade

Unit

Test Conditions/Comments

Min

Typ

Max

Min

Typ

Max

ADuM3151

IDD1

2.8

6.5

10.5

18

mA

CL = 0 pF, low speed channels

IDD2

4.6

8

9.0

17

mA

CL = 0 pF, low speed channels

ADuM3152

IDD1

3.4

6

11.7

18

mA

CL = 0 pF, low speed channels

IDD2

5.0

8

10.0

16

mA

CL = 0 pF, low speed channels

ADuM3153

IDD1

2.8

5.5

11.7

18

mA

CL = 0 pF, low speed channels

IDD2

3.5

9

10.0

15

mA

CL = 0 pF, low speed channels

Rev. A | Page 5 of 22

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